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gas/

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2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (match_template): Changed to return
	 const template *.  Handle i.swap_operand for 3 operands.
	 (build_vex_prefix): Take const template *.  Swap operand for
	 2-byte VEX prefix if possible.
	 (md_assemble): Updated.
	 (build_modrm_byte): Handle RegMem bit for SSE2AVX.

gas/testsuite/

2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run x86-64-avx-swap and x86-64-avx-swap-intel.

	* gas/i386/opts.s: Add tests for movsd, movss, vmovsd and
	vmovss.
	* gas/i386/x86-64-opts.s: Likewise.

	* gas/i386/opts.d: Updated.
	* gas/i386/opts-intel.d: Likewise.
	* gas/i386/sse2avx-opts.d: Likewise.
	* gas/i386/sse2avx-opts-intel.d: Likewise.
	* gas/i386/x86-64-opts.d: Likewise.
	* gas/i386/x86-64-opts-intel.d: Likewise.
	* gas/i386/x86-64-sse2avx-opts.d: Likewise.
	* gas/i386/x86-64-sse2avx-opts-intel.d: Likewise.

	* gas/i386/x86-64-avx-swap.d: New.
	* gas/i386/x86-64-avx-swap.s: Likewise.
	* gas/i386/x86-64-avx-swap-intel.d: Likewise.

opcodes/

2008-12-23  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EXdS): New.
	(EXdVexS): Likewise.
	(EXqVexS): Likewise.
	(d_swap_mode): Likewise.
	(q_mode): Updated.
	(prefix_table): Use EXdS on movss and EXqS on movsd.
	(vex_len_table): Use EXdVexS on vmovss and EXqVexS on vmovsd.
	(intel_operand_size): Handle d_swap_mode.
	(OP_EX): Likewise.

	* i386-opc.h (S): Update comments.

	* i386-opc.tbl: Add S to movss, movsd, vmovss and vmovsd.
	* i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
2008-12-23 15:14:15 +00:00
parent feddcd0d46
commit fa99fab222
22 changed files with 619 additions and 114 deletions
Download Patch File Download Diff File Expand all files Collapse all files

20
opcodes/i386-dis.c
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@@ -362,6 +362,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define EMx { OP_EM, x_mode }
#define EXw { OP_EX, w_mode }
#define EXd { OP_EX, d_mode }
#define EXdS { OP_EX, d_swap_mode }
#define EXq { OP_EX, q_mode }
#define EXqS { OP_EX, q_swap_mode }
#define EXx { OP_EX, x_mode }
@@ -384,7 +385,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define VexFMA { OP_VEX_FMA, vex_mode }
#define Vex128FMA { OP_VEX_FMA, vex128_mode }
#define EXdVex { OP_EX_Vex, d_mode }
#define EXdVexS { OP_EX_Vex, d_swap_mode }
#define EXqVex { OP_EX_Vex, q_mode }
#define EXqVexS { OP_EX_Vex, q_swap_mode }
#define EXVexW { OP_EX_VexW, x_mode }
#define EXdVexW { OP_EX_VexW, d_mode }
#define EXqVexW { OP_EX_VexW, q_mode }
@@ -427,8 +430,10 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
#define w_mode (v_swap_mode + 1)
/* double word operand */
#define d_mode (w_mode + 1)
/* double word operand with operand swapped */
#define d_swap_mode (d_mode + 1)
/* quad word operand */
#define q_mode (d_mode + 1)
#define q_mode (d_swap_mode + 1)
/* quad word operand with operand swapped */
#define q_swap_mode (q_mode + 1)
/* ten-byte operand */
@@ -2427,9 +2432,9 @@ static const struct dis386 prefix_table[][4] = {
/* PREFIX_0F11 */
{
{ "movups", { EXxS, XM } },
{ "movss", { EXd, XM } },
{ "movss", { EXdS, XM } },
{ "movupd", { EXxS, XM } },
{ "movsd", { EXq, XM } },
{ "movsd", { EXqS, XM } },
},
/* PREFIX_0F12 */
@@ -7843,13 +7848,13 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_11_P_1 */
{
{ "vmovss", { EXdVex, Vex128, XM } },
{ "vmovss", { EXdVexS, Vex128, XM } },
{ "(bad)", { XX } },
},
/* VEX_LEN_11_P_3 */
{
{ "vmovsd", { EXqVex, Vex128, XM } },
{ "vmovsd", { EXqVexS, Vex128, XM } },
{ "(bad)", { XX } },
},
@@ -11415,6 +11420,7 @@ intel_operand_size (int bytemode, int sizeflag)
used_prefixes |= (prefixes & PREFIX_DATA);
break;
case d_mode:
case d_swap_mode:
case dqd_mode:
oappend ("DWORD PTR ");
break;
@@ -12652,7 +12658,9 @@ OP_EX (int bytemode, int sizeflag)
add = 0;
if ((sizeflag & SUFFIX_ALWAYS)
&& (bytemode == x_swap_mode || bytemode == q_swap_mode))
&& (bytemode == x_swap_mode
|| bytemode == d_swap_mode
|| bytemode == q_swap_mode))
swap_operand ();
/* Skip mod/rm byte. */