forked from Imagelibrary/binutils-gdb
* layout.cc (Layout::get_output_section): Add is_interp and
is_dynamic_linker_section parameters. Change all callers. (Layout::choose_output_section): Likewise. (Layout::make_output_section): Likewise. (Layout::add_output_section_data): Add is_dynamic_linker_section parameter. Change all callers. * layout.h (class Layout): Update declarations. * output.h (class Output_section): Add is_interp, set_is_interp, is_dynamic_linker_section, set_is_dynamic_linker_section methods. Add is_interp_, is_dynamic_linker_section_ fields. Change generate_code_fills_at_write_ to a bitfield. * output.cc (Output_section::Output_sections): Initialize new fields. (Output_segment::add_output_section): Add do_sort parameter. Change all callers.
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@@ -708,7 +708,7 @@ Target_powerpc<size, big_endian>::got_section(Symbol_table* symtab,
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layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
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elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE,
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this->got_);
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this->got_, false);
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// Create the GOT2 or TOC in the .got section.
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if (size == 32)
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@@ -717,7 +717,7 @@ Target_powerpc<size, big_endian>::got_section(Symbol_table* symtab,
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layout->add_output_section_data(".got2", elfcpp::SHT_PROGBITS,
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elfcpp::SHF_ALLOC
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| elfcpp::SHF_WRITE,
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this->got2_);
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this->got2_, false);
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}
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else
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{
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@@ -725,7 +725,7 @@ Target_powerpc<size, big_endian>::got_section(Symbol_table* symtab,
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layout->add_output_section_data(".toc", elfcpp::SHT_PROGBITS,
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elfcpp::SHF_ALLOC
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| elfcpp::SHF_WRITE,
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this->toc_);
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this->toc_, false);
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}
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// Define _GLOBAL_OFFSET_TABLE_ at the start of the .got section.
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@@ -751,7 +751,7 @@ Target_powerpc<size, big_endian>::rela_dyn_section(Layout* layout)
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gold_assert(layout != NULL);
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this->rela_dyn_ = new Reloc_section(parameters->options().combreloc());
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layout->add_output_section_data(".rela.dyn", elfcpp::SHT_RELA,
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elfcpp::SHF_ALLOC, this->rela_dyn_);
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elfcpp::SHF_ALLOC, this->rela_dyn_, true);
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}
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return this->rela_dyn_;
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}
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@@ -811,7 +811,7 @@ Output_data_plt_powerpc<size, big_endian>::Output_data_plt_powerpc(Layout* layou
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{
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this->rel_ = new Reloc_section(false);
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layout->add_output_section_data(".rela.plt", elfcpp::SHT_RELA,
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elfcpp::SHF_ALLOC, this->rel_);
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elfcpp::SHF_ALLOC, this->rel_, true);
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}
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template<int size, bool big_endian>
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@@ -940,7 +940,7 @@ Target_powerpc<size, big_endian>::make_plt_entry(Symbol_table* symtab,
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(elfcpp::SHF_ALLOC
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| elfcpp::SHF_EXECINSTR
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| elfcpp::SHF_WRITE),
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this->plt_);
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this->plt_, false);
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// Define _PROCEDURE_LINKAGE_TABLE_ at the start of the .plt section.
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symtab->define_in_output_data("_PROCEDURE_LINKAGE_TABLE_", NULL,
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@@ -1502,7 +1502,7 @@ Target_powerpc<size, big_endian>::scan_relocs(
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Output_section* os = layout->add_output_section_data(".sdata", 0,
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elfcpp::SHF_ALLOC
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| elfcpp::SHF_WRITE,
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sdata);
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sdata, false);
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symtab->define_in_output_data("_SDA_BASE_", NULL,
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os,
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32768, 0,
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