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* simops.c: Add multiply & divide support. Abort for system

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instructions.
This commit is contained in:
Jeff Law
1996-08-29 20:08:37 +00:00
parent 1fe983dcdf
commit e98e3b2c5a
2 changed files with 99 additions and 54 deletions
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3
sim/v850/ChangeLog
View File

@@ -1,5 +1,8 @@
Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com)
* simops.c: Add multiply & divide support. Abort for system
instructions.
* simops.c: Add logicals, mov, movhi, movea, add, addi, sub
and subr. No condition codes yet.

150
sim/v850/simops.c
View File

@@ -42,11 +42,6 @@ OP_581 ()
{
}
void
OP_40 ()
{
}
void
OP_582 ()
{
@@ -107,11 +102,6 @@ OP_400 ()
{
}
void
OP_2E0 ()
{
}
void
OP_160 ()
{
@@ -137,20 +127,6 @@ OP_660 ()
{
}
void
OP_E0 ()
{
}
void
OP_16087E0 ()
{
}
void
OP_16007E0 ()
{
}
/* add reg, reg
@@ -205,6 +181,52 @@ OP_180 ()
State.regs[OP[1]] = State.regs[OP[0]] - State.regs[OP[1]];
}
/* mulh reg1, reg2
XXX condition codes */
void
OP_E0 ()
{
State.regs[OP[1]] = ((State.regs[OP[1]] & 0xffff)
* (State.regs[OP[2]] & 0xffff));
}
/* mulh sign_extend(imm5), reg2
Condition codes */
void
OP_2E0 ()
{
int value = OP[0];
value = (value << 27) >> 27;
State.regs[OP[1]] = (State.regs[OP[1]] & 0xffff) * value;
}
/* mulhi imm16, reg1, reg2
XXX condition codes */
void
OP_6E0 ()
{
int value = OP[0];
value = value & 0xffff;
State.regs[OP[1]] = (State.regs[OP[1]] & 0xffff) * value;
}
/* divh reg1, reg2
XXX condition codes.
XXX Is this signed or unsigned? */
void
OP_40 ()
{
State.regs[OP[1]] /= (State.regs[OP[1]] & 0xffff);
}
void
OP_8007E0 ()
{
@@ -215,16 +237,6 @@ OP_C007E0 ()
{
}
void
OP_12007E0 ()
{
}
void
OP_4007E0 ()
{
}
void
OP_10720 ()
{
@@ -325,11 +337,6 @@ OP_260 ()
{
}
void
OP_6E0 ()
{
}
void
OP_740 ()
{
@@ -340,11 +347,6 @@ OP_80 ()
{
}
void
OP_14007E0 ()
{
}
/* not reg1, reg2
XXX condition codes */
@@ -369,21 +371,11 @@ OP_2C0 ()
{
}
void
OP_10007E0 ()
{
}
void
OP_47C0 ()
{
}
void
OP_2007E0 ()
{
}
void
OP_7E0 ()
{
@@ -474,3 +466,53 @@ void
OP_501 ()
{
}
/* di, not supported */
void
OP_16007E0 ()
{
abort ();
}
/* ei, not supported */
void
OP_16087E0 ()
{
abort ();
}
/* halt, not supported */
void
OP_12007E0 ()
{
abort ();
}
/* reti, not supported */
void
OP_14007E0 ()
{
abort ();
}
/* trap, not supportd */
void
OP_10007E0 ()
{
abort ();
}
/* ldsr, not supported */
void
OP_2007E0 ()
{
abort ();
}
/* stsr, not supported */
void
OP_4007E0 ()
{
abort ();
}