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PR22348, conflicting global vars in crx and cr16

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include/
	PR 22348
	* opcode/cr16.h (instruction): Delete.
	(cr16_words, cr16_allWords, cr16_currInsn): Delete.
	* opcode/crx.h (crx_cst4_map): Rename from cst4_map.
	(crx_cst4_maps): Rename from cst4_maps.
	(crx_no_op_insn): Rename from no_op_insn.
	(instruction): Delete.
opcodes/
	PR 22348
	* cr16-dis.c (cr16_cinvs, instruction, cr16_currInsn): Make static.
	(cr16_words, cr16_allWords, processing_argument_number): Likewise.
	(imm4flag, size_changed): Likewise.
	* crx-dis.c (crx_cinvs, NUMCINVS, instruction, currInsn): Likewise.
	(words, allWords, processing_argument_number): Likewise.
	(cst4flag, size_changed): Likewise.
	* crx-opc.c (crx_cst4_map): Rename from cst4_map.
	(crx_cst4_maps): Rename from cst4_maps.
	(crx_no_op_insn): Rename from no_op_insn.
gas/
	PR 22348
	* config/tc-crx.c (instruction, output_opcode): Make static.
	(relocatable, ins_parse, cur_arg_num): Likewise.
	(parse_insn): Adjust for renamed opcodes globals.
	(check_range): Likewise
This commit is contained in:
Alan Modra
2017-10-25 21:59:14 +10:30
parent cc628f3dbb
commit e5d70d6b5a
9 changed files with 64 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/ChangeLog
View File

@@ -1,3 +1,11 @@
2017-10-25 Alan Modra <amodra@gmail.com>
PR 22348
* config/tc-crx.c (instruction, output_opcode): Make static.
(relocatable, ins_parse, cur_arg_num): Likewise.
(parse_insn): Adjust for renamed opcodes globals.
(check_range): Likewise
2017-10-25 Alan Modra <amodra@gmail.com> 2017-10-25 Alan Modra <amodra@gmail.com>
* testsuite/gas/all/fill-1.d: Exclude tic4x and tic54x. * testsuite/gas/all/fill-1.d: Exclude tic4x and tic54x.

20
gas/config/tc-crx.c
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@@ -69,21 +69,21 @@ static struct hash_control *reg_hash;
/* CRX coprocessor registers hash table. */ /* CRX coprocessor registers hash table. */
static struct hash_control *copreg_hash; static struct hash_control *copreg_hash;
/* Current instruction we're assembling. */ /* Current instruction we're assembling. */
const inst *instruction; static const inst *instruction;
/* Global variables. */ /* Global variables. */
/* Array to hold an instruction encoding. */ /* Array to hold an instruction encoding. */
long output_opcode[2]; static long output_opcode[2];
/* Nonzero means a relocatable symbol. */ /* Nonzero means a relocatable symbol. */
int relocatable; static int relocatable;
/* A copy of the original instruction (used in error messages). */ /* A copy of the original instruction (used in error messages). */
char ins_parse[MAX_INST_LEN]; static char ins_parse[MAX_INST_LEN];
/* The current processed argument number. */ /* The current processed argument number. */
int cur_arg_num; static int cur_arg_num;
/* Generic assembler global variables which must be defined by all targets. */ /* Generic assembler global variables which must be defined by all targets. */
@@ -1043,9 +1043,9 @@ parse_insn (ins *insn, char *operands)
int i; int i;
/* Handle instructions with no operands. */ /* Handle instructions with no operands. */
for (i = 0; no_op_insn[i] != NULL; i++) for (i = 0; crx_no_op_insn[i] != NULL; i++)
{ {
if (streq (no_op_insn[i], instruction->mnemonic)) if (streq (crx_no_op_insn[i], instruction->mnemonic))
{ {
insn->nargs = 0; insn->nargs = 0;
return; return;
@@ -1387,7 +1387,7 @@ check_range (long *num, int bits, int unsigned flags, int update)
: instruction->flags & DISPUD4 ? 4 : instruction->flags & DISPUD4 ? 4
: 0); : 0);
for (bin = 0; bin < cst4_maps; bin++) for (bin = 0; bin < crx_cst4_maps; bin++)
{ {
if (value == mul * bin) if (value == mul * bin)
{ {
@@ -1404,9 +1404,9 @@ check_range (long *num, int bits, int unsigned flags, int update)
{ {
int is_cst4 = 0; int is_cst4 = 0;
for (bin = 0; bin < cst4_maps; bin++) for (bin = 0; bin < crx_cst4_maps; bin++)
{ {
if (value == (uint32_t) cst4_map[bin]) if (value == (uint32_t) crx_cst4_map[bin])
{ {
is_cst4 = 1; is_cst4 = 1;
if (update) if (update)

10
include/ChangeLog
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@@ -1,3 +1,13 @@
2017-10-25 Alan Modra <amodra@gmail.com>
PR 22348
* opcode/cr16.h (instruction): Delete.
(cr16_words, cr16_allWords, cr16_currInsn): Delete.
* opcode/crx.h (crx_cst4_map): Rename from cst4_map.
(crx_cst4_maps): Rename from cst4_maps.
(crx_no_op_insn): Rename from no_op_insn.
(instruction): Delete.
2017-10-24 Andrew Waterman <andrew@sifive.com> 2017-10-24 Andrew Waterman <andrew@sifive.com>
* opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the * opcode/riscv.h (VALID_RVC_LUI_IMM): c.lui can't load the

8
include/opcode/cr16.h
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@@ -404,9 +404,6 @@ extern const unsigned int cr16_num_cc;
/* Table of instructions with no operands. */ /* Table of instructions with no operands. */
extern const char * cr16_no_op_insn[]; extern const char * cr16_no_op_insn[];
/* Current instruction we're assembling. */
extern const inst *instruction;
/* A macro for representing the instruction "constant" opcode, that is, /* A macro for representing the instruction "constant" opcode, that is,
the FIXED part of the instruction. The "constant" opcode is represented the FIXED part of the instruction. The "constant" opcode is represented
as a 32-bit unsigned long, where OPC is expanded (by a left SHIFT) as a 32-bit unsigned long, where OPC is expanded (by a left SHIFT)
@@ -439,11 +436,6 @@ typedef unsigned long long ULONGLONG;
typedef unsigned long dwordU; typedef unsigned long dwordU;
typedef unsigned short wordU; typedef unsigned short wordU;
/* Globals to store opcode data and build the instruction. */
extern wordU cr16_words[3];
extern ULONGLONG cr16_allWords;
extern ins cr16_currInsn;
/* Prototypes for function in cr16-dis.c. */ /* Prototypes for function in cr16-dis.c. */
extern void cr16_make_instruction (void); extern void cr16_make_instruction (void);
extern int cr16_match_opcode (void); extern int cr16_match_opcode (void);

9
include/opcode/crx.h
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@@ -384,14 +384,11 @@ extern const int crx_num_traps;
#define NUMTRAPS crx_num_traps #define NUMTRAPS crx_num_traps
/* cst4 operand mapping. */ /* cst4 operand mapping. */
extern const int cst4_map[]; extern const int crx_cst4_map[];
extern const int cst4_maps; extern const int crx_cst4_maps;
/* Table of instructions with no operands. */ /* Table of instructions with no operands. */
extern const char* no_op_insn[]; extern const char* crx_no_op_insn[];
/* Current instruction we're assembling. */
extern const inst *instruction;
/* A macro for representing the instruction "constant" opcode, that is, /* A macro for representing the instruction "constant" opcode, that is,
the FIXED part of the instruction. The "constant" opcode is represented the FIXED part of the instruction. The "constant" opcode is represented

13
opcodes/ChangeLog
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@@ -1,3 +1,16 @@
2017-10-25 Alan Modra <amodra@gmail.com>
PR 22348
* cr16-dis.c (cr16_cinvs, instruction, cr16_currInsn): Make static.
(cr16_words, cr16_allWords, processing_argument_number): Likewise.
(imm4flag, size_changed): Likewise.
* crx-dis.c (crx_cinvs, NUMCINVS, instruction, currInsn): Likewise.
(words, allWords, processing_argument_number): Likewise.
(cst4flag, size_changed): Likewise.
* crx-opc.c (crx_cst4_map): Rename from cst4_map.
(crx_cst4_maps): Rename from cst4_maps.
(crx_no_op_insn): Rename from no_op_insn.
2017-10-24 Andrew Waterman <andrew@sifive.com> 2017-10-24 Andrew Waterman <andrew@sifive.com>
* riscv-opc.c (match_c_addi16sp) : New function. * riscv-opc.c (match_c_addi16sp) : New function.

16
opcodes/cr16-dis.c
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@@ -54,7 +54,7 @@ typedef struct
cinv_entry; cinv_entry;
/* CR16 'cinv' options mapping. */ /* CR16 'cinv' options mapping. */
const cinv_entry cr16_cinvs[] = static const cinv_entry cr16_cinvs[] =
{ {
{"cinv[i]", "cinv [i]"}, {"cinv[i]", "cinv [i]"},
{"cinv[i,u]", "cinv [i,u]"}, {"cinv[i,u]", "cinv [i,u]"},
@@ -78,20 +78,20 @@ typedef enum REG_ARG_TYPE
REG_ARG_TYPE; REG_ARG_TYPE;
/* Current opcode table entry we're disassembling. */ /* Current opcode table entry we're disassembling. */
const inst *instruction; static const inst *instruction;
/* Current instruction we're disassembling. */ /* Current instruction we're disassembling. */
ins cr16_currInsn; static ins cr16_currInsn;
/* The current instruction is read into 3 consecutive words. */ /* The current instruction is read into 3 consecutive words. */
wordU cr16_words[3]; static wordU cr16_words[3];
/* Contains all words in appropriate order. */ /* Contains all words in appropriate order. */
ULONGLONG cr16_allWords; static ULONGLONG cr16_allWords;
/* Holds the current processed argument number. */ /* Holds the current processed argument number. */
int processing_argument_number; static int processing_argument_number;
/* Nonzero means a IMM4 instruction. */ /* Nonzero means a IMM4 instruction. */
int imm4flag; static int imm4flag;
/* Nonzero means the instruction's original size is /* Nonzero means the instruction's original size is
incremented (escape sequence is used). */ incremented (escape sequence is used). */
int size_changed; static int size_changed;
/* Print the constant expression length. */ /* Print the constant expression length. */

18
opcodes/crx-dis.c
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@@ -58,7 +58,7 @@ typedef struct
cinv_entry; cinv_entry;
/* CRX 'cinv' options. */ /* CRX 'cinv' options. */
const cinv_entry crx_cinvs[] = static const cinv_entry crx_cinvs[] =
{ {
{"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, {"[d,u]", 5}, {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, {"[d,u]", 5},
{"[d,i]", 6}, {"[d,i,u]", 7}, {"[b]", 8}, {"[d,i]", 6}, {"[d,i,u]", 7}, {"[b]", 8},
@@ -81,22 +81,22 @@ typedef enum REG_ARG_TYPE
REG_ARG_TYPE; REG_ARG_TYPE;
/* Number of valid 'cinv' instruction options. */ /* Number of valid 'cinv' instruction options. */
int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0])); static int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0]));
/* Current opcode table entry we're disassembling. */ /* Current opcode table entry we're disassembling. */
const inst *instruction; static const inst *instruction;
/* Current instruction we're disassembling. */ /* Current instruction we're disassembling. */
ins currInsn; static ins currInsn;
/* The current instruction is read into 3 consecutive words. */ /* The current instruction is read into 3 consecutive words. */
wordU words[3]; static wordU words[3];
/* Contains all words in appropriate order. */ /* Contains all words in appropriate order. */
ULONGLONG allWords; static ULONGLONG allWords;
/* Holds the current processed argument number. */ /* Holds the current processed argument number. */
int processing_argument_number; static int processing_argument_number;
/* Nonzero means a CST4 instruction. */ /* Nonzero means a CST4 instruction. */
int cst4flag; static int cst4flag;
/* Nonzero means the instruction's original size is /* Nonzero means the instruction's original size is
incremented (escape sequence is used). */ incremented (escape sequence is used). */
int size_changed; static int size_changed;
static int get_number_of_operands (void); static int get_number_of_operands (void);
static argtype getargtype (operand_type); static argtype getargtype (operand_type);

6
opcodes/crx-opc.c
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@@ -704,15 +704,15 @@ The value in entry <N> is mapped to the value <N>
Example (for N=5): Example (for N=5):
cst4_map[5]=-4 -->> 5 */ cst4_map[5]=-4 -->> 5 */
const int cst4_map[] = const int crx_cst4_map[] =
{ {
0, 1, 2, 3, 4, -4, -1, 7, 8, 16, 32, 20, 12, 48 0, 1, 2, 3, 4, -4, -1, 7, 8, 16, 32, 20, 12, 48
}; };
const int cst4_maps = ARRAY_SIZE (cst4_map); const int crx_cst4_maps = ARRAY_SIZE (crx_cst4_map);
/* CRX instructions that don't have arguments. */ /* CRX instructions that don't have arguments. */
const char* no_op_insn[] = const char* crx_no_op_insn[] =
{ {
"di", "ei", "eiwait", "nop", "retx", "wait", NULL "di", "ei", "eiwait", "nop", "retx", "wait", NULL
}; };