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[ARC] Disassembler: fix LIMM detection for short instructions.

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The ARC (short) instructions are using a special register number to
indicate is the instruction uses a long immediate (LIMM).  In the case
of short instruction, this LIMM indicator depends on the ISA version
used. Thus, for ARCv1 processors, the LIMM indicator is 0x3E, the same
value used in "long" instructions.  However, for the ARCv2 processors,
this LIMM indicator is 0x1E.

This patch fixes the LIMM detection for ARCv1 ISA and adds two tests.

gas/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* testsuite/gas/arc/shortlimm_a7.d: New file.
	* testsuite/gas/arc/shortlimm_a7.s: Likewise.
	* testsuite/gas/arc/shortlimm_hs.d: Likewise.
	* testsuite/gas/arc/shortlimm_hs.s: Likewise.

include/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

	* opcode/arc.h (ARC_OPCODE_ARCV2): New define.

opcodes/
2016-10-13  Claudiu Zissulescu  <claziss@synopsys.com>

        * arc-dis.c (find_format_from_table): Discriminate LIMM indicator
	usage on ISA basis.
This commit is contained in:
Claudiu Zissulescu
2016-10-13 15:01:19 +02:00
parent afb1110bfa
commit e5b06ef06b
9 changed files with 60 additions and 2 deletions
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1
include/opcode/arc.h
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@@ -186,6 +186,7 @@ extern const struct arc_opcode arc_opcodes[];
#define ARC_OPCODE_ARCALL (ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 \
| ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
#define ARC_OPCODE_ARCFPX (ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM)
#define ARC_OPCODE_ARCV2 (ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS)
/* CPU extensions. */
#define ARC_EA 0x0001