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* gdbarch.sh (software_single_step): Remove "insert_breakpoints_p" and

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"sig" arguments, add "regcache" argument.
	* gdbarch.c, gdbarch.h: Regenerate.

	* infrun.c (resume): Update SOFTWARE_SINGLE_STEP call arguments.
	(handle_inferior_event): Call remove_single_step_breakpoints directly
	instead of calling SOFTWARE_SINGLE_STEP to remove breakpoints.

	* alpha-tdep.c (alpha_software_single_step): Update argument list.
	Remove handling of !insert_breakpoints_p case.
	* arm-tdep.c (arm_software_single_step): Likewise.
	* cris-tdep.c (cris_software_single_step): Likewise.
	* mips-tdep.c (mips_software_single_step): Likewise.
	* rs6000-tdep.c (rs6000_software_single_step): Likewise.
	* sparc-tdep.c (sparc_software_single_step): Likewise.
	* spu-tdep.c (spu_software_single_step): Likewise.

	* alpha-tdep.h (alpha_software_single_step): Update prototype.
	* mips-tdep.h (mips_software_single_step): Likewise.
	* rs6000-tdep.h (rs6000_software_single_step): Likewise.
	* sparc-tdep.h (sparc_software_single_step): Likewise.
This commit is contained in:
Ulrich Weigand
2007-04-14 18:10:54 +00:00
parent 06a862851c
commit e0cd558aaa
16 changed files with 145 additions and 173 deletions
Download Patch File Download Diff File Expand all files Collapse all files

77
gdb/spu-tdep.c
View File

@@ -1079,52 +1079,47 @@ spu_breakpoint_from_pc (CORE_ADDR * pcptr, int *lenptr)
/* Software single-stepping support. */
int
spu_software_single_step (enum target_signal signal, int insert_breakpoints_p)
spu_software_single_step (struct regcache *regcache)
{
if (insert_breakpoints_p)
{
CORE_ADDR pc, next_pc;
unsigned int insn;
int offset, reg;
gdb_byte buf[4];
CORE_ADDR pc, next_pc;
unsigned int insn;
int offset, reg;
gdb_byte buf[4];
regcache_cooked_read (current_regcache, SPU_PC_REGNUM, buf);
/* Mask off interrupt enable bit. */
pc = extract_unsigned_integer (buf, 4) & -4;
regcache_cooked_read (regcache, SPU_PC_REGNUM, buf);
/* Mask off interrupt enable bit. */
pc = extract_unsigned_integer (buf, 4) & -4;
if (target_read_memory (pc, buf, 4))
return 1;
insn = extract_unsigned_integer (buf, 4);
if (target_read_memory (pc, buf, 4))
return 1;
insn = extract_unsigned_integer (buf, 4);
/* Next sequential instruction is at PC + 4, except if the current
instruction is a PPE-assisted call, in which case it is at PC + 8.
Wrap around LS limit to be on the safe side. */
if ((insn & 0xffffff00) == 0x00002100)
next_pc = (pc + 8) & (SPU_LS_SIZE - 1);
else
next_pc = (pc + 4) & (SPU_LS_SIZE - 1);
insert_single_step_breakpoint (next_pc);
if (is_branch (insn, &offset, &reg))
{
CORE_ADDR target = offset;
if (reg == SPU_PC_REGNUM)
target += pc;
else if (reg != -1)
{
regcache_cooked_read_part (current_regcache, reg, 0, 4, buf);
target += extract_unsigned_integer (buf, 4) & -4;
}
target = target & (SPU_LS_SIZE - 1);
if (target != next_pc)
insert_single_step_breakpoint (target);
}
}
/* Next sequential instruction is at PC + 4, except if the current
instruction is a PPE-assisted call, in which case it is at PC + 8.
Wrap around LS limit to be on the safe side. */
if ((insn & 0xffffff00) == 0x00002100)
next_pc = (pc + 8) & (SPU_LS_SIZE - 1);
else
remove_single_step_breakpoints ();
next_pc = (pc + 4) & (SPU_LS_SIZE - 1);
insert_single_step_breakpoint (next_pc);
if (is_branch (insn, &offset, &reg))
{
CORE_ADDR target = offset;
if (reg == SPU_PC_REGNUM)
target += pc;
else if (reg != -1)
{
regcache_cooked_read_part (regcache, reg, 0, 4, buf);
target += extract_unsigned_integer (buf, 4) & -4;
}
target = target & (SPU_LS_SIZE - 1);
if (target != next_pc)
insert_single_step_breakpoint (target);
}
return 1;
}