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* mips.h: Document new field descriptors +Q.

Browse Source 
(OP_SH_SEQI, OP_MASK_SEQI): New bit mask and shift count for SEQI.

opcodes/

        * mips-dis.c (print_insn_args): Handle field descriptor +Q.
        * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
        seqi, sne and snei.

gas/

        * config/tc-mips.c (validate_mips_insn): Handle field descriptor +Q.
        (mips_ip): Likewise.
        (macro_build): Likewise.
        (CPU_HAS_SEQ): New macro.
        (macro2) <M_SEQ_I, M_SNE_I>: Use it.  Emit seq/sne and seqi/snei.

gas/testsuite/

        * gas/mips/octeon.s, gas/mips/octeon.d: Add tests for seq* and sne*.
        * gas/mips/octeon-ill.s, gas/mips/octeon-ill.s: Add tests for seqi
        and snei.
This commit is contained in:
Nick Clifton
2008-06-12 21:44:54 +00:00
parent ff7eeb894e
commit dd3cbb7ef7
12 changed files with 152 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

54
gas/config/tc-mips.c
View File

@@ -444,6 +444,9 @@ static int mips_32bitmode = 0;
/* True if CPU has a ror instruction. */
#define CPU_HAS_ROR(CPU) CPU_HAS_DROR (CPU)
/* True if CPU has seq/sne and seqi/snei instructions. */
#define CPU_HAS_SEQ(CPU) ((CPU) == CPU_OCTEON)
/* True if mflo and mfhi can be immediately followed by instructions
which write to the HI and LO registers.
@@ -3500,6 +3503,10 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
INSERT_OPERAND (EXTMSBD, insn, va_arg (args, int));
continue;
case 'Q':
INSERT_OPERAND (SEQI, insn, va_arg (args, int));
continue;
default:
internalError ();
}
@@ -7541,6 +7548,14 @@ macro2 (struct mips_cl_insn *ip)
move_register (dreg, 0);
break;
}
if (CPU_HAS_SEQ (mips_opts.arch)
&& -512 <= imm_expr.X_add_number
&& imm_expr.X_add_number < 512)
{
macro_build (NULL, "seqi", "t,r,+Q", dreg, sreg,
imm_expr.X_add_number);
break;
}
if (imm_expr.X_op == O_constant
&& imm_expr.X_add_number >= 0
&& imm_expr.X_add_number < 0x10000)
@@ -7555,6 +7570,13 @@ macro2 (struct mips_cl_insn *ip)
macro_build (&imm_expr, HAVE_32BIT_GPRS ? "addiu" : "daddiu",
"t,r,j", dreg, sreg, BFD_RELOC_LO16);
}
else if (CPU_HAS_SEQ (mips_opts.arch))
{
used_at = 1;
load_register (AT, &imm_expr, HAVE_64BIT_GPRS);
macro_build (NULL, "seq", "d,v,t", dreg, sreg, AT);
break;
}
else
{
load_register (AT, &imm_expr, HAVE_64BIT_GPRS);
@@ -7688,6 +7710,14 @@ macro2 (struct mips_cl_insn *ip)
dreg, 0, BFD_RELOC_LO16);
break;
}
if (CPU_HAS_SEQ (mips_opts.arch)
&& -512 <= imm_expr.X_add_number
&& imm_expr.X_add_number < 512)
{
macro_build (NULL, "snei", "t,r,+Q", dreg, sreg,
imm_expr.X_add_number);
break;
}
if (imm_expr.X_op == O_constant
&& imm_expr.X_add_number >= 0
&& imm_expr.X_add_number < 0x10000)
@@ -7702,6 +7732,13 @@ macro2 (struct mips_cl_insn *ip)
macro_build (&imm_expr, HAVE_32BIT_GPRS ? "addiu" : "daddiu",
"t,r,j", dreg, sreg, BFD_RELOC_LO16);
}
else if (CPU_HAS_SEQ (mips_opts.arch))
{
used_at = 1;
load_register (AT, &imm_expr, HAVE_64BIT_GPRS);
macro_build (NULL, "sne", "d,v,t", dreg, sreg, AT);
break;
}
else
{
load_register (AT, &imm_expr, HAVE_64BIT_GPRS);
@@ -8272,6 +8309,7 @@ validate_mips_insn (const struct mips_opcode *opc)
case 'X': USE_BITS (OP_MASK_BBITIND, OP_SH_BBITIND); break;
case 'p': USE_BITS (OP_MASK_CINSPOS, OP_SH_CINSPOS); break;
case 'P': USE_BITS (OP_MASK_CINSPOS, OP_SH_CINSPOS); break;
case 'Q': USE_BITS (OP_MASK_SEQI, OP_SH_SEQI); break;
case 's': USE_BITS (OP_MASK_CINSLM1, OP_SH_CINSLM1); break;
case 'S': USE_BITS (OP_MASK_CINSLM1, OP_SH_CINSLM1); break;
@@ -9068,6 +9106,22 @@ do_msbd:
s = expr_end;
continue;
case 'Q':
/* seqi/snei immediate field. */
my_getExpression (&imm_expr, s);
check_absolute_expr (ip, &imm_expr);
if ((long) imm_expr.X_add_number < -512
|| (long) imm_expr.X_add_number >= 512)
{
as_bad (_("Improper immediate (%ld)"),
(long) imm_expr.X_add_number);
imm_expr.X_add_number = 0;
}
INSERT_OPERAND (SEQI, *ip, imm_expr.X_add_number);
imm_expr.X_op = O_absent;
s = expr_end;
continue;
default:
as_bad (_("internal: bad mips opcode (unknown extension operand type `+%c'): %s %s"),
*args, insn->name, insn->args);