forked from Imagelibrary/binutils-gdb
* interp.c (sim_hw_configure): Connect port-X to cpu-write-port.
* dv-m68hc11.c (m68hc11cpu_ports): Add cpu-write-port input. (m68hc11cpu_port_event): Handle CPU_WRITE_PORT event.
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@@ -229,6 +229,10 @@ sim_hw_configure (SIM_DESC sd)
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sim_hw_parse (sd, "/m68hc11/m68hc11eepr/reg 0xb000 512");
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sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11eepr");
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}
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sim_hw_parse (sd, "/m68hc11 > port-a cpu-write-port /m68hc11");
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sim_hw_parse (sd, "/m68hc11 > port-b cpu-write-port /m68hc11");
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sim_hw_parse (sd, "/m68hc11 > port-c cpu-write-port /m68hc11");
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sim_hw_parse (sd, "/m68hc11 > port-d cpu-write-port /m68hc11");
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cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11");
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}
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else
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@@ -256,6 +260,7 @@ sim_hw_configure (SIM_DESC sd)
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/* M68hc11 Timer configuration. */
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sim_hw_parse (sd, "/m68hc12/m68hc12tim/reg 0x1b 0x5");
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sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12tim");
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sim_hw_parse (sd, "/m68hc12 > capture capture /m68hc12/m68hc12tim");
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}
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/* Create the SPI device. */
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@@ -277,6 +282,10 @@ sim_hw_configure (SIM_DESC sd)
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sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12eepr");
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}
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sim_hw_parse (sd, "/m68hc12 > port-a cpu-write-port /m68hc12");
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sim_hw_parse (sd, "/m68hc12 > port-b cpu-write-port /m68hc12");
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sim_hw_parse (sd, "/m68hc12 > port-c cpu-write-port /m68hc12");
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sim_hw_parse (sd, "/m68hc12 > port-d cpu-write-port /m68hc12");
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cpu->hw_cpu = sim_hw_parse (sd, "/m68hc12");
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}
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return 0;
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