forked from Imagelibrary/binutils-gdb
sim/ChangeLog:
2005-10-06 Jim Blandy <jimb@redhat.com> Add simulator for Renesas M32C and M16C. * m32c: New directory. * configure.ac: Add entry for Renesas M32C. * configure: Regenerate. sim/m32c/ChangeLog: 2005-10-06 Jim Blandy <jimb@redhat.com> Simulator for Renesas M32C and M16C, by DJ Delorie <dj@redhat.com>, with further work from Jim Blandy <jimb@redhat.com> and Kevin Buettner <kevinb@redhat.com>. * ChangeLog: New. * Makefile.in: New. * blinky.S: New. * config.in: New. * configure: New. * configure.in: New. * cpu.h: New. * gdb-if.c: New. * gloss.S: New. * int.c: New. * int.h: New. * load.c: New. * load.h: New. * m32c.opc: New. * main.c: New. * mem.c: New. * mem.h: New. * misc.c: New. * misc.h: New. * opc2c.c: New. * r8c.opc: New. * reg.c: New. * safe-fgets.c: New. * safe-fgets.h: New. * sample.S: New. * sample.ld: New. * sample2.c: New. * srcdest.c: New. * syscalls.c: New. * syscalls.h: New. * trace.c: New. * trace.h: New.
This commit is contained in:
Jim Blandy
224
sim/m32c/cpu.h
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224
sim/m32c/cpu.h
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/* cpu.h --- declarations for the M32C core.
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Copyright (C) 2005 Free Software Foundation, Inc.
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Contributed by Red Hat, Inc.
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This file is part of the GNU simulators.
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The GNU simulators are free software; you can redistribute them and/or
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modify them under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU simulators are distributed in the hope that they will be
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useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with the GNU simulators; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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02110-1301, USA */
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extern int verbose;
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extern int trace;
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extern int enable_counting;
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typedef unsigned char QI;
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typedef unsigned short HI;
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typedef unsigned long SI;
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typedef unsigned long long DI;
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#define CPU_R8C 0x11
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#define CPU_M16C 0x12
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#define CPU_M32CM 0x23
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#define CPU_M32C 0x24
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extern int m32c_cpu;
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void m32c_set_cpu (int cpu);
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#define A16 (m32c_cpu & 0x10)
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#define A24 (m32c_cpu & 0x20)
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typedef struct
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{
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HI r_r0;
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HI r_r2;
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HI r_r1;
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HI r_r3;
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SI r_a0;
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SI r_a1;
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SI r_sb;
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SI r_fb;
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} reg_bank_type;
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typedef struct
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{
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reg_bank_type r[2];
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QI r_intbh;
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HI r_intbl;
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SI r_usp;
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SI r_isp;
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SI r_pc;
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HI r_flags;
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} regs_type;
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extern regs_type regs;
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extern int addr_mask;
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extern int membus_mask;
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#define FLAGBIT_C 0x0001
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#define FLAGBIT_D 0x0002
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#define FLAGBIT_Z 0x0004
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#define FLAGBIT_S 0x0008
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#define FLAGBIT_B 0x0010
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#define FLAGBIT_O 0x0020
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#define FLAGBIT_I 0x0040
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#define FLAGBIT_U 0x0080
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#define REG_BANK (regs.r_flags & FLAG_B ? 1 : 0)
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typedef enum
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{
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mem,
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r0, r0h, r0l,
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r1, r1h, r1l,
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r2, r2r0,
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r3, r3r1,
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r3r1r2r0,
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r3r2r1r0,
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a0,
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a1, a1a0,
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sb, fb,
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intb, intbl, intbh,
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sp, usp, isp, pc, flags,
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num_regs
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} reg_id;
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extern char *reg_names[];
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extern int reg_bytes[];
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extern unsigned int b2mask[];
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extern unsigned int b2signbit[];
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extern int b2maxsigned[];
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extern int b2minsigned[];
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void init_regs (void);
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void stack_heap_stats (void);
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void set_pointer_width (int bytes);
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unsigned int get_reg (reg_id id);
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DI get_reg_ll (reg_id id);
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void put_reg (reg_id id, unsigned int value);
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void put_reg_ll (reg_id id, DI value);
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void set_flags (int mask, int newbits);
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void set_oszc (int value, int bytes, int c);
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void set_szc (int value, int bytes, int c);
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void set_osz (int value, int bytes);
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void set_sz (int value, int bytes);
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void set_zc (int z, int c);
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void set_c (int c);
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const char *bits (int v, int b);
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typedef struct
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{
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QI bytes;
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QI mem;
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HI mask;
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union
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{
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unsigned int addr;
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reg_id reg;
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} u;
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} srcdest;
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void decode_indirect (int src_indirect, int dest_indirect);
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void decode_index (int src_addend, int dest_addend);
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/* r8c */
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srcdest decode_srcdest4 (int destcode, int bw);
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srcdest decode_dest3 (int destcode, int bw);
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srcdest decode_src2 (int srccode, int bw, int d);
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srcdest decode_dest1 (int destcode, int bw);
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srcdest decode_jumpdest (int destcode, int w);
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srcdest decode_cr (int crcode);
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srcdest decode_cr_b (int crcode, int bank);
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#define CR_B_DCT0 0
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#define CR_B_INTB 1
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#define CR_B_DMA0 2
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/* m32c */
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srcdest decode_dest23 (int ddd, int dd, int bytes);
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srcdest decode_src23 (int sss, int ss, int bytes);
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srcdest decode_src3 (int sss, int bytes);
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srcdest decode_dest2 (int dd, int bytes);
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srcdest widen_sd (srcdest sd);
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srcdest reg_sd (reg_id reg);
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/* Mask has the one appropriate bit set. */
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srcdest decode_bit (int destcode);
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srcdest decode_bit11 (int op0);
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int get_bit (srcdest sd);
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void put_bit (srcdest sd, int val);
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int get_bit2 (srcdest sd, int bit);
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void put_bit2 (srcdest sd, int bit, int val);
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int get_src (srcdest sd);
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void put_dest (srcdest sd, int value);
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int condition_true (int cond_id);
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#define FLAG(f) (regs.r_flags & f ? 1 : 0)
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#define FLAG_C FLAG(FLAGBIT_C)
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#define FLAG_D FLAG(FLAGBIT_D)
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#define FLAG_Z FLAG(FLAGBIT_Z)
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#define FLAG_S FLAG(FLAGBIT_S)
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#define FLAG_B FLAG(FLAGBIT_B)
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#define FLAG_O FLAG(FLAGBIT_O)
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#define FLAG_I FLAG(FLAGBIT_I)
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#define FLAG_U FLAG(FLAGBIT_U)
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/* Instruction step return codes.
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Suppose one of the decode_* functions below returns a value R:
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- If M32C_STEPPED (R), then the single-step completed normally.
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- If M32C_HIT_BREAK (R), then the program hit a breakpoint.
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- If M32C_EXITED (R), then the program has done an 'exit' system
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call, and the exit code is M32C_EXIT_STATUS (R).
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- If M32C_STOPPED (R), then a signal (number M32C_STOP_SIG (R)) was
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generated.
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For building step return codes:
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- M32C_MAKE_STEPPED is the return code for finishing a normal step.
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- M32C_MAKE_HIT_BREAK is the return code for hitting a breakpoint.
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- M32C_MAKE_EXITED (C) is the return code for exiting with status C.
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- M32C_MAKE_STOPPED (S) is the return code for stopping on signal S. */
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#define M32C_MAKE_STEPPED() (0)
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#define M32C_MAKE_HIT_BREAK() (1)
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#define M32C_MAKE_EXITED(c) (((int) (c) << 8) + 2)
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#define M32C_MAKE_STOPPED(s) (((int) (s) << 8) + 3)
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#define M32C_STEPPED(r) ((r) == M32C_MAKE_STEPPED ())
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#define M32C_HIT_BREAK(r) ((r) == M32C_MAKE_HIT_BREAK ())
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#define M32C_EXITED(r) (((r) & 0xff) == 2)
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#define M32C_EXIT_STATUS(r) ((r) >> 8)
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#define M32C_STOPPED(r) (((r) & 0xff) == 3)
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#define M32C_STOP_SIG(r) ((r) >> 8)
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/* The step result for the current step. Global to allow
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communication between the stepping function and the system
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calls. */
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extern int step_result;
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/* Used to detect heap/stack collisions */
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extern unsigned int heaptop;
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extern unsigned int heapbottom;
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/* Points to one of the below functions, set by m32c_load(). */
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extern int (*decode_opcode) ();
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extern int decode_r8c ();
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extern int decode_m32c ();
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extern void trace_register_changes ();
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