forked from Imagelibrary/binutils-gdb
sim: m32r: hoist cgen rules to top-level
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@@ -35,55 +35,7 @@ SIM_OBJS = \
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$(M32R2_OBJS) \
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traps.o
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SIM_EXTRA_CLEAN = m32r-clean
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# Some modules don't build cleanly yet.
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cpu.o cpu2.o cpux.o m32r.o m32r2.o m32rx.o mloop.o mloop2.o mloopx.o sem.o sim-if.o traps.o: SIM_WERROR_CFLAGS =
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## COMMON_POST_CONFIG_FRAG
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m32r-clean:
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rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
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rm -f tmp-*
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# NOTE: Generated source files are specified as full paths,
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# e.g. $(srcdir)/arch.c, because make may decide the files live
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# in objdir otherwise.
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stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn"
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$(SILENCE) touch $@
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$(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
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@true
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stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32rbf mach=m32r SUFFIX= \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
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$(SILENCE) touch $@
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$(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
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@true
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stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32rxf mach=m32rx SUFFIX=x \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SILENCE) touch $@
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$(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
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@true
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stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
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$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
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cpu=m32r2f mach=m32r2 SUFFIX=2 \
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archfile=$(CPU_DIR)/m32r.cpu \
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FLAGS="with-scache with-profile=fn" \
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EXTRAFILES="$(CGEN_CPU_SEMSW)"
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$(SILENCE) touch $@
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$(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
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@true
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@@ -75,3 +75,22 @@ SIM_ALL_RECURSIVE_DEPS += $(%C%_BUILD_OUTPUTS)
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$(AM_V_at)touch $@
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MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
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## Target that triggers all cgen targets that works when --disable-cgen-maint.
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%D%/cgen: %D%/cgen-arch %D%/cgen-cpu-decode %D%/cgen-cpu-decode-x %D%/cgen-cpu-decode-2
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%D%/cgen-arch:
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$(AM_V_GEN)mach=all FLAGS="with-scache with-profile=fn"; $(CGEN_GEN_ARCH)
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%D%/arch.h %D%/arch.c %D%/cpuall.h: @CGEN_MAINT@ %D%/cgen-arch
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%D%/cgen-cpu-decode:
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$(AM_V_GEN)cpu=m32rbf mach=m32r FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
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%D%/cpu.h %D%/sem.c %D%/sem-switch.c %D%/model.c %D%/decode.c %D%/decode.h: @CGEN_MAINT@ %D%/cgen-cpu-decode
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%D%/cgen-cpu-decode-x:
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$(AM_V_GEN)cpu=m32rxf mach=m32rx SUFFIX=x FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
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%D%/cpux.h %D%/semx-switch.c %D%/modelx.c %D%/decodex.c %D%/decodex.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-x
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%D%/cgen-cpu-decode-2:
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$(AM_V_GEN)cpu=m32r2f mach=m32r2 SUFFIX=2 FLAGS="with-scache with-profile=fn" EXTRAFILES="$(CGEN_CPU_SEMSW)"; $(CGEN_GEN_CPU_DECODE)
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%D%/cpu2.h %D%/sem2-switch.c %D%/model2.c %D%/decode2.c %D%/decode2.h: @CGEN_MAINT@ %D%/cgen-cpu-decode-2
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