forked from Imagelibrary/binutils-gdb
Initial creation of sourceware repository
This commit is contained in:
Stan Shebs
424
sim/mn10200/ChangeLog
Normal file
424
sim/mn10200/ChangeLog
Normal file
@@ -0,0 +1,424 @@
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Wed Jun 17 11:37:59 1998 Mark Alexander <marka@cygnus.com>
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|
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* Makefile.in: Define NL_TARGET so that targ-vals.h will be used
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instead of syscall.h.
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* simops.c: Use targ-vals.h instead of syscall.h.
|
||||
|
||||
Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
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||||
|
||||
Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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* config.in: Ditto.
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|
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Sun Apr 26 15:19:58 1998 Tom Tromey <tromey@cygnus.com>
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|
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* acconfig.h: New file.
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* configure.in: Reverted change of Apr 24; use sinclude again.
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||||
|
||||
Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
|
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* config.in: Ditto.
|
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|
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Fri Apr 24 11:19:13 1998 Tom Tromey <tromey@cygnus.com>
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* configure.in: Don't call sinclude.
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|
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Thu Apr 23 09:48:14 1998 Tom Tromey <tromey@creche>
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||||
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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||||
Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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||||
Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
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|
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Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
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|
||||
Tue Feb 17 12:46:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* interp.c (sim_store_register, sim_fetch_register): Pass in
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length parameter. Return -1.
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Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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|
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Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Tue Jan 13 00:01:40 1998 Jeffrey A Law (law@cygnus.com)
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* simops.c: Stores to abs16 memory addresses zero extend the
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abs16 address.
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Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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* config.in: Ditto.
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|
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Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Wed Oct 22 14:43:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_load): Pass lma_p and sim_write args to
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sim_load_file.
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Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
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|
||||
Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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|
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Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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Tue Sep 2 18:41:23 1997 Jeffrey A Law (law@cygnus.com)
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* simops.c: PC relative instructions are relative to the next
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instruction, not the current instruction.
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Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
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|
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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* config.in: Ditto.
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Tue Aug 26 10:40:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_kill): Delete.
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(sim_create_inferior): Add ABFD argument.
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(sim_load): Move setting of PC from here.
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(sim_create_inferior): To here.
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Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
* config.in: Ditto.
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|
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Mon Aug 25 16:14:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
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* interp.c (sim_open): Add ABFD argument.
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Tue Jun 24 13:44:08 1997 Jeffrey A Law (law@cygnus.com)
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* interp.c (sim_resume): Clear State.exited.
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(sim_stop_reason): If State.exited is nonzero, then indicate that
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the simulator exited instead of stopped.
|
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* mn10200_sim.h (struct _state): Add exited field.
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* simops.c (syscall): Set State.exited for SYS_exit.
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Tue May 20 17:45:47 1997 Jeffrey A Law (law@cygnus.com)
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||||
* interp.c: Replace all references to load_mem and store_mem
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with references to load_byte, load_half, load_3_byte, load_word
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and store_byte, store_half, store_3_byte, store_word.
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||||
(INLINE): Delete definition.
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||||
(load_mem_big): Likewise.
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(max_mem): Make it global.
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||||
(dispatch): Make this function inline.
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||||
(load_mem, store_mem): Delete functions.
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||||
* mn10200_sim.h (INLINE): Define.
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||||
(RLW): Delete unused definition.
|
||||
(load_mem, store_mem): Delete declarations.
|
||||
(load_mem_big): New definition.
|
||||
(load_byte, load_half, load_3_byte, load_word): New functions.
|
||||
(store_byte, store_half, store_3_byte, store_word): New functions.
|
||||
* simops.c: Replace all references to load_mem and store_mem
|
||||
with references to load_byte, load_half, load_3_byte, load_word
|
||||
and store_byte, store_half, store_3_byte, store_word.
|
||||
|
||||
Tue May 20 10:21:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* interp.c (sim_open): Add callback argument.
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||||
(sim_set_callbacks): Delete SIM_DESC argument.
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||||
|
||||
Sun May 18 16:59:09 1997 Jeffrey A Law (law@cygnus.com)
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||||
|
||||
* interp.c (compare_simops): New function.
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||||
(sim_open): Sort the Simops table before inserting entries
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||||
into the hash table.
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||||
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||||
Fri May 16 16:29:18 1997 Jeffrey A Law (law@cygnus.com)
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||||
|
||||
* interp.c (load_mem): Fix formatting/indention problems with
|
||||
last change. If we get a load from an out of range address,
|
||||
abort instead of returning zero.
|
||||
(store_mem): Abort if we try to store to an out of range address.
|
||||
|
||||
Wed May 14 21:21:30 1997 Bob Manson <manson@charmed.cygnus.com>
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||||
|
||||
* simops.c (OP_F010): Fix some arguments to correspond
|
||||
with reality (types of arguments passed to lseek, read,
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||||
write, open).
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||||
|
||||
* interp.c (max_mem): New variable.
|
||||
(load_mem): Check memory address against max_mem to
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||||
avoid some self-destructive behaviors.
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||||
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||||
Tue May 13 21:45:24 1997 Jeffrey A Law (law@cygnus.com)
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||||
|
||||
* simops.c: Fix typo in cc0 setting for lsr.
|
||||
|
||||
Tue May 6 13:22:12 1997 Jeffrey A Law (law@cygnus.com)
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||||
|
||||
* interp.c: Random typo/thinko cleanups.
|
||||
|
||||
Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
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||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Mon Apr 21 10:29:30 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix typo in "open" syscall emulation.
|
||||
|
||||
Fri Apr 18 14:04:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
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||||
|
||||
* interp.c (sim_stop): Add stub function.
|
||||
|
||||
Thu Apr 17 03:23:58 1997 Doug Evans <dje@canuck.cygnus.com>
|
||||
|
||||
* Makefile.in (SIM_OBJS): Add sim-load.o.
|
||||
* interp.c (sim_kind, myname): New static locals.
|
||||
(sim_open): Set sim_kind, myname. Ignore -E arg.
|
||||
(sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
|
||||
load file into simulator. Set start address from bfd.
|
||||
(sim_create_inferior): Return SIM_RC. Delete arg start_address.
|
||||
|
||||
Wed Apr 16 18:06:50 1997 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* simops.c (OP_F010): SYS_execv, SYS_time, SYS_times, SYS_utime
|
||||
only include if implemented by host.
|
||||
|
||||
Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
* config.in: Ditto.
|
||||
|
||||
Fri Apr 4 20:01:56 1997 Ian Lance Taylor <ian@cygnus.com>
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||||
|
||||
* Makefile.in: Change mn10200-opc.o to m10200-opc.o, to match
|
||||
corresponding change in opcodes directory.
|
||||
|
||||
Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
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||||
|
||||
* interp.c (sim_open): New arg `kind'.
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Thu Mar 20 20:28:14 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10200_sim.h: Protect uses of "signed" to cater to broken
|
||||
non-ansi compilers (HPs). Don't use #error for the same reason.
|
||||
|
||||
Tue Mar 18 12:23:31 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Don't sign-extend immediate for "mov imm16,an".
|
||||
Simplify "sub" handling. Fix "mul" to properly sign extend
|
||||
operands. Set CF appropriately for btst imm16,dn. Implement "rti".
|
||||
|
||||
* gencode.c: Delete unused "Opcodes" and "curop" variables.
|
||||
|
||||
Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
||||
|
||||
* configure: Regenerated to track ../common/aclocal.m4 changes.
|
||||
|
||||
Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
|
||||
|
||||
* configure: Re-generate.
|
||||
|
||||
Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
|
||||
|
||||
* configure: Regenerate to track ../common/aclocal.m4 changes.
|
||||
|
||||
Thu Mar 13 12:53:14 1997 Doug Evans <dje@canuck.cygnus.com>
|
||||
|
||||
* interp.c (sim_open): New SIM_DESC result. Argument is now
|
||||
in argv form.
|
||||
(other sim_*): New SIM_DESC argument.
|
||||
|
||||
Wed Mar 12 15:02:35 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix typo for "bclr".
|
||||
|
||||
Wed Feb 26 16:46:13 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Handle new calling convention in emulated syscall
|
||||
code.
|
||||
|
||||
Mon Feb 24 14:25:11 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* interp.c (load_mem_big): Add some missing parens.
|
||||
|
||||
Wed Feb 19 23:19:08 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Don't use "long long" data types for intermediate
|
||||
values in "divu", "mul" and "mulu" instructions.
|
||||
|
||||
Fri Feb 14 02:46:46 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* interp.c (hash): Rework to be more efficient.
|
||||
(dispatch): Renamed from lookup_hash. Dispatch to the target
|
||||
function and update the PC here.
|
||||
(load_mem_big): Now a macro.
|
||||
(sim_resume): Restructure code to read an insn, determine its
|
||||
length, call dispatch routines, etc to be much more efficient.
|
||||
|
||||
Fri Feb 7 12:59:36 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* interp.c (MAX_HASH): Redefine to 127.
|
||||
(struct hash_entry): Add "count" field when HASH_STAT is defined.
|
||||
(hash): Improve hashing for many heavily used opcodes.
|
||||
(lookup_hash): Bump counters if HASH_STAT is defined.
|
||||
(sim_open): Don't put the same opcode in the hash table more
|
||||
than once. Clear counters if HASH_STAT is defined.
|
||||
(sim_resume): After program exits, dump hash table stats if
|
||||
HASH_STAT is defined.
|
||||
|
||||
Wed Feb 5 10:28:37 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix register extraction for "ext dn".
|
||||
|
||||
Tue Feb 4 17:27:41 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix register extractions for "movbu (an), dm".
|
||||
|
||||
Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
|
||||
|
||||
* Makefile.in (@COMMON_MAKEFILE_FRAG): Use
|
||||
COMMON_{PRE,POST}_CONFIG_FRAG instead.
|
||||
* configure.in: sinclude ../common/aclocal.m4.
|
||||
* configure: Regenerated.
|
||||
|
||||
Fri Jan 31 01:19:02 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Get carry-in bit right for rol. Just clear the
|
||||
NF flag for btst imm8,dn.
|
||||
|
||||
Wed Jan 29 15:47:42 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Properly compute ZF flag for many insns.
|
||||
|
||||
Sat Jan 25 17:06:55 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Properly truncate divisor and dividend before
|
||||
performing "divu" operation.
|
||||
|
||||
Fri Jan 24 10:47:48 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c (init_system): Allocate 2^19 bytes of space for
|
||||
the simulator.
|
||||
|
||||
Thu Jan 23 21:17:33 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Rework code to extract arguments for emulated
|
||||
syscalls to handle 24bit pointers.
|
||||
|
||||
Thu Jan 23 14:06:04 1997 Stu Grossman (grossman@critters.cygnus.com)
|
||||
|
||||
* configure configure.in Makefile.in: Update to new configure
|
||||
scheme which is more compatible with WinGDB builds.
|
||||
* configure.in: Improve comment on how to run autoconf.
|
||||
* configure: Re-run autoconf to get new ../common/aclocal.m4.
|
||||
* Makefile.in: Use autoconf substitution to install common
|
||||
makefile fragment.
|
||||
|
||||
Thu Jan 23 12:04:38 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix destination register for "mov (abs24),an".
|
||||
|
||||
Tue Jan 21 15:59:21 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: "rts" adds 4 to the stack pointer.
|
||||
|
||||
* simops.c: Fix CF and CX computation for add instructions.
|
||||
|
||||
* simops.c: Leave the upper 8 bits alone for logical ops.
|
||||
Mask off high 8 bits before doing any shifts/rotates.
|
||||
Fix carry bit handling in rotates again.
|
||||
|
||||
Mon Jan 20 10:45:08 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Don't lose the sign bit for "asr".
|
||||
|
||||
Fri Jan 17 01:45:14 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix overflow computation for "cmp" and "sub"
|
||||
instructions.
|
||||
|
||||
* simops.c: Use the right register for "jmp (an)" and "jsr (an)".
|
||||
|
||||
* interp.c (hash): Improve hashing for 3 byte instructions.
|
||||
|
||||
* simops.c: Fix extraction of 16/24bit immediates for some
|
||||
instructions. "cmp" instructions only modify the PSW.
|
||||
Fix various thinkos when extracting register operands too.
|
||||
|
||||
Thu Jan 16 07:47:56 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* simops.c: Fix "rol" and "ror".
|
||||
|
||||
* simops.c: Truncate PC to 24bits after modifying it.
|
||||
Closer stab at emulated system calls.
|
||||
|
||||
Tue Jan 14 12:33:12 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* interp.c (hash): Improve hashing of two byte insns.
|
||||
(store_mem): Handle storing 3 byte quantities.
|
||||
|
||||
* simops.c: Fix various typos/thinkos.
|
||||
|
||||
* interp.c (load_mem_big, load_mem, store_mem): Fix thinko in
|
||||
code to handle 24bit addresses.
|
||||
* simops.c (REG0_8, REG0_16): Fix typo.
|
||||
|
||||
Mon Jan 6 16:17:09 1997 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10200_sim.h: Various fixes for mixed 16/24bit architecture.
|
||||
* interp.c: Similarly.
|
||||
* simops.c: Similarly.
|
||||
|
||||
* Makefile.in, config.in, configure, configure.in: New files.
|
||||
* gencode.c, interp.c, mn10200_sim.h, simops.c: New files.
|
||||
|
||||
52
sim/mn10200/Makefile.in
Normal file
52
sim/mn10200/Makefile.in
Normal file
@@ -0,0 +1,52 @@
|
||||
# Makefile template for Configure for the mn10200 sim library.
|
||||
# Copyright (C) 1997 Free Software Foundation, Inc.
|
||||
# Written by Cygnus Support.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or modify
|
||||
# it under the terms of the GNU General Public License as published by
|
||||
# the Free Software Foundation; either version 2 of the License, or
|
||||
# (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
|
||||
|
||||
## COMMON_PRE_CONFIG_FRAG
|
||||
|
||||
SIM_OBJS = interp.o table.o simops.o sim-load.o
|
||||
SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/sysmec
|
||||
SIM_EXTRA_CLEAN = clean-extra
|
||||
|
||||
# Select mn10200 support in nltvals.def.
|
||||
NL_TARGET = -DNL_TARGET_mn10200
|
||||
|
||||
INCLUDE = mn10200_sim.h $(srcdir)/../../include/callback.h
|
||||
|
||||
## COMMON_POST_CONFIG_FRAG
|
||||
|
||||
simops.h: gencode
|
||||
./gencode -h >$@
|
||||
|
||||
table.c: gencode simops.h
|
||||
./gencode >$@
|
||||
|
||||
gencode.o: gencode.c $(INCLUDE)
|
||||
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c
|
||||
|
||||
m10200-opc.o: $(srcdir)/../../opcodes/m10200-opc.c
|
||||
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/../../opcodes/m10200-opc.c
|
||||
|
||||
gencode: gencode.o m10200-opc.o
|
||||
$(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o m10200-opc.o $(BUILD_LIB)
|
||||
|
||||
clean-extra:
|
||||
rm -f table.c simops.h gencode
|
||||
|
||||
interp.o: interp.c table.c $(INCLUDE)
|
||||
simops.o: simops.c $(INCLUDE)
|
||||
table.o: table.c
|
||||
15
sim/mn10200/acconfig.h
Normal file
15
sim/mn10200/acconfig.h
Normal file
@@ -0,0 +1,15 @@
|
||||
|
||||
/* Define to 1 if NLS is requested. */
|
||||
#undef ENABLE_NLS
|
||||
|
||||
/* Define as 1 if you have catgets and don't want to use GNU gettext. */
|
||||
#undef HAVE_CATGETS
|
||||
|
||||
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
|
||||
#undef HAVE_GETTEXT
|
||||
|
||||
/* Define as 1 if you have the stpcpy function. */
|
||||
#undef HAVE_STPCPY
|
||||
|
||||
/* Define if your locale.h file contains LC_MESSAGES. */
|
||||
#undef HAVE_LC_MESSAGES
|
||||
158
sim/mn10200/config.in
Normal file
158
sim/mn10200/config.in
Normal file
@@ -0,0 +1,158 @@
|
||||
/* config.in. Generated automatically from configure.in by autoheader. */
|
||||
|
||||
/* Define if using alloca.c. */
|
||||
#undef C_ALLOCA
|
||||
|
||||
/* Define to empty if the keyword does not work. */
|
||||
#undef const
|
||||
|
||||
/* Define to one of _getb67, GETB67, getb67 for Cray-2 and Cray-YMP systems.
|
||||
This function is required for alloca.c support on those systems. */
|
||||
#undef CRAY_STACKSEG_END
|
||||
|
||||
/* Define if you have alloca, as a function or macro. */
|
||||
#undef HAVE_ALLOCA
|
||||
|
||||
/* Define if you have <alloca.h> and it should be used (not on Ultrix). */
|
||||
#undef HAVE_ALLOCA_H
|
||||
|
||||
/* Define if you have a working `mmap' system call. */
|
||||
#undef HAVE_MMAP
|
||||
|
||||
/* Define as __inline if that's what the C compiler calls it. */
|
||||
#undef inline
|
||||
|
||||
/* Define to `long' if <sys/types.h> doesn't define. */
|
||||
#undef off_t
|
||||
|
||||
/* Define if you need to in order for stat and other things to work. */
|
||||
#undef _POSIX_SOURCE
|
||||
|
||||
/* Define as the return type of signal handlers (int or void). */
|
||||
#undef RETSIGTYPE
|
||||
|
||||
/* Define to `unsigned' if <sys/types.h> doesn't define. */
|
||||
#undef size_t
|
||||
|
||||
/* If using the C implementation of alloca, define if you know the
|
||||
direction of stack growth for your system; otherwise it will be
|
||||
automatically deduced at run-time.
|
||||
STACK_DIRECTION > 0 => grows toward higher addresses
|
||||
STACK_DIRECTION < 0 => grows toward lower addresses
|
||||
STACK_DIRECTION = 0 => direction of growth unknown
|
||||
*/
|
||||
#undef STACK_DIRECTION
|
||||
|
||||
/* Define if you have the ANSI C header files. */
|
||||
#undef STDC_HEADERS
|
||||
|
||||
/* Define to 1 if NLS is requested. */
|
||||
#undef ENABLE_NLS
|
||||
|
||||
/* Define as 1 if you have gettext and don't want to use GNU gettext. */
|
||||
#undef HAVE_GETTEXT
|
||||
|
||||
/* Define as 1 if you have the stpcpy function. */
|
||||
#undef HAVE_STPCPY
|
||||
|
||||
/* Define if your locale.h file contains LC_MESSAGES. */
|
||||
#undef HAVE_LC_MESSAGES
|
||||
|
||||
/* Define if you have the __argz_count function. */
|
||||
#undef HAVE___ARGZ_COUNT
|
||||
|
||||
/* Define if you have the __argz_next function. */
|
||||
#undef HAVE___ARGZ_NEXT
|
||||
|
||||
/* Define if you have the __argz_stringify function. */
|
||||
#undef HAVE___ARGZ_STRINGIFY
|
||||
|
||||
/* Define if you have the __setfpucw function. */
|
||||
#undef HAVE___SETFPUCW
|
||||
|
||||
/* Define if you have the dcgettext function. */
|
||||
#undef HAVE_DCGETTEXT
|
||||
|
||||
/* Define if you have the getcwd function. */
|
||||
#undef HAVE_GETCWD
|
||||
|
||||
/* Define if you have the getpagesize function. */
|
||||
#undef HAVE_GETPAGESIZE
|
||||
|
||||
/* Define if you have the getrusage function. */
|
||||
#undef HAVE_GETRUSAGE
|
||||
|
||||
/* Define if you have the munmap function. */
|
||||
#undef HAVE_MUNMAP
|
||||
|
||||
/* Define if you have the putenv function. */
|
||||
#undef HAVE_PUTENV
|
||||
|
||||
/* Define if you have the setenv function. */
|
||||
#undef HAVE_SETENV
|
||||
|
||||
/* Define if you have the setlocale function. */
|
||||
#undef HAVE_SETLOCALE
|
||||
|
||||
/* Define if you have the sigaction function. */
|
||||
#undef HAVE_SIGACTION
|
||||
|
||||
/* Define if you have the stpcpy function. */
|
||||
#undef HAVE_STPCPY
|
||||
|
||||
/* Define if you have the strcasecmp function. */
|
||||
#undef HAVE_STRCASECMP
|
||||
|
||||
/* Define if you have the strchr function. */
|
||||
#undef HAVE_STRCHR
|
||||
|
||||
/* Define if you have the time function. */
|
||||
#undef HAVE_TIME
|
||||
|
||||
/* Define if you have the <argz.h> header file. */
|
||||
#undef HAVE_ARGZ_H
|
||||
|
||||
/* Define if you have the <fcntl.h> header file. */
|
||||
#undef HAVE_FCNTL_H
|
||||
|
||||
/* Define if you have the <fpu_control.h> header file. */
|
||||
#undef HAVE_FPU_CONTROL_H
|
||||
|
||||
/* Define if you have the <limits.h> header file. */
|
||||
#undef HAVE_LIMITS_H
|
||||
|
||||
/* Define if you have the <locale.h> header file. */
|
||||
#undef HAVE_LOCALE_H
|
||||
|
||||
/* Define if you have the <malloc.h> header file. */
|
||||
#undef HAVE_MALLOC_H
|
||||
|
||||
/* Define if you have the <nl_types.h> header file. */
|
||||
#undef HAVE_NL_TYPES_H
|
||||
|
||||
/* Define if you have the <stdlib.h> header file. */
|
||||
#undef HAVE_STDLIB_H
|
||||
|
||||
/* Define if you have the <string.h> header file. */
|
||||
#undef HAVE_STRING_H
|
||||
|
||||
/* Define if you have the <strings.h> header file. */
|
||||
#undef HAVE_STRINGS_H
|
||||
|
||||
/* Define if you have the <sys/param.h> header file. */
|
||||
#undef HAVE_SYS_PARAM_H
|
||||
|
||||
/* Define if you have the <sys/resource.h> header file. */
|
||||
#undef HAVE_SYS_RESOURCE_H
|
||||
|
||||
/* Define if you have the <sys/time.h> header file. */
|
||||
#undef HAVE_SYS_TIME_H
|
||||
|
||||
/* Define if you have the <time.h> header file. */
|
||||
#undef HAVE_TIME_H
|
||||
|
||||
/* Define if you have the <unistd.h> header file. */
|
||||
#undef HAVE_UNISTD_H
|
||||
|
||||
/* Define if you have the <values.h> header file. */
|
||||
#undef HAVE_VALUES_H
|
||||
3892
sim/mn10200/configure
vendored
Executable file
3892
sim/mn10200/configure
vendored
Executable file
File diff suppressed because it is too large
Load Diff
10
sim/mn10200/configure.in
Normal file
10
sim/mn10200/configure.in
Normal file
@@ -0,0 +1,10 @@
|
||||
dnl Process this file with autoconf to produce a configure script.
|
||||
sinclude(../common/aclocal.m4)
|
||||
AC_PREREQ(2.5)dnl
|
||||
AC_INIT(Makefile.in)
|
||||
|
||||
SIM_AC_COMMON
|
||||
|
||||
AC_CHECK_HEADERS(unistd.h)
|
||||
|
||||
SIM_AC_OUTPUT
|
||||
154
sim/mn10200/gencode.c
Normal file
154
sim/mn10200/gencode.c
Normal file
@@ -0,0 +1,154 @@
|
||||
#include "mn10200_sim.h"
|
||||
|
||||
static void write_header PARAMS ((void));
|
||||
static void write_opcodes PARAMS ((void));
|
||||
static void write_template PARAMS ((void));
|
||||
|
||||
int
|
||||
main (argc, argv)
|
||||
int argc;
|
||||
char *argv[];
|
||||
{
|
||||
if ((argc > 1) && (strcmp (argv[1], "-h") == 0))
|
||||
write_header();
|
||||
else if ((argc > 1) && (strcmp (argv[1], "-t") == 0))
|
||||
write_template ();
|
||||
else
|
||||
write_opcodes();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
write_header ()
|
||||
{
|
||||
struct mn10200_opcode *opcode;
|
||||
|
||||
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
|
||||
printf("void OP_%X PARAMS ((unsigned long, unsigned long));\t\t/* %s */\n",
|
||||
opcode->opcode, opcode->name);
|
||||
}
|
||||
|
||||
|
||||
/* write_template creates a file all required functions, ready */
|
||||
/* to be filled out */
|
||||
|
||||
static void
|
||||
write_template ()
|
||||
{
|
||||
struct mn10200_opcode *opcode;
|
||||
int i,j;
|
||||
|
||||
printf ("#include \"mn10200_sim.h\"\n");
|
||||
printf ("#include \"simops.h\"\n");
|
||||
|
||||
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
|
||||
{
|
||||
printf("/* %s */\nvoid\nOP_%X (insn, extension)\n unsigned long insn, extension;\n{\n", opcode->name, opcode->opcode);
|
||||
|
||||
/* count operands */
|
||||
j = 0;
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
int flags = mn10200_operands[opcode->operands[i]].flags;
|
||||
|
||||
if (flags)
|
||||
j++;
|
||||
}
|
||||
switch (j)
|
||||
{
|
||||
case 0:
|
||||
printf ("printf(\" %s\\n\");\n", opcode->name);
|
||||
break;
|
||||
case 1:
|
||||
printf ("printf(\" %s\\t%%x\\n\", OP[0]);\n", opcode->name);
|
||||
break;
|
||||
case 2:
|
||||
printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",
|
||||
opcode->name);
|
||||
break;
|
||||
case 3:
|
||||
printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",
|
||||
opcode->name);
|
||||
break;
|
||||
default:
|
||||
fprintf (stderr,"Too many operands: %d\n", j);
|
||||
}
|
||||
printf ("}\n\n");
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
write_opcodes ()
|
||||
{
|
||||
struct mn10200_opcode *opcode;
|
||||
int i, j;
|
||||
int numops;
|
||||
|
||||
/* write out opcode table */
|
||||
printf ("#include \"mn10200_sim.h\"\n");
|
||||
printf ("#include \"simops.h\"\n\n");
|
||||
printf ("struct simops Simops[] = {\n");
|
||||
|
||||
for (opcode = (struct mn10200_opcode *)mn10200_opcodes; opcode->name; opcode++)
|
||||
{
|
||||
int size;
|
||||
|
||||
if (opcode->format == FMT_1)
|
||||
size = 1;
|
||||
else if (opcode->format == FMT_2 || opcode->format == FMT_4)
|
||||
size = 2;
|
||||
else if (opcode->format == FMT_3 || opcode->format == FMT_5)
|
||||
size = 3;
|
||||
else if (opcode->format == FMT_6)
|
||||
size = 4;
|
||||
else if (opcode->format == FMT_7)
|
||||
size = 5;
|
||||
else
|
||||
abort ();
|
||||
|
||||
printf (" { 0x%x,0x%x,OP_%X,%d,%d,",
|
||||
opcode->opcode, opcode->mask, opcode->opcode,
|
||||
size, opcode->format);
|
||||
|
||||
/* count operands */
|
||||
j = 0;
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
int flags = mn10200_operands[opcode->operands[i]].flags;
|
||||
|
||||
if (flags)
|
||||
j++;
|
||||
}
|
||||
printf ("%d,{",j);
|
||||
|
||||
j = 0;
|
||||
numops = 0;
|
||||
for (i = 0; i < 6; i++)
|
||||
{
|
||||
int flags = mn10200_operands[opcode->operands[i]].flags;
|
||||
int shift = mn10200_operands[opcode->operands[i]].shift;
|
||||
|
||||
if (flags)
|
||||
{
|
||||
if (j)
|
||||
printf (", ");
|
||||
printf ("%d,%d,%d", shift,
|
||||
mn10200_operands[opcode->operands[i]].bits,flags);
|
||||
j = 1;
|
||||
numops++;
|
||||
}
|
||||
}
|
||||
|
||||
switch (numops)
|
||||
{
|
||||
case 0:
|
||||
printf ("0,0,0");
|
||||
case 1:
|
||||
printf (",0,0,0");
|
||||
}
|
||||
|
||||
printf ("}},\n");
|
||||
}
|
||||
printf ("{ 0,0,NULL,0,0,0,{0,0,0,0,0,0}},\n};\n");
|
||||
}
|
||||
800
sim/mn10200/interp.c
Normal file
800
sim/mn10200/interp.c
Normal file
@@ -0,0 +1,800 @@
|
||||
#include <signal.h>
|
||||
#include "sysdep.h"
|
||||
#include "bfd.h"
|
||||
|
||||
#include "mn10200_sim.h"
|
||||
|
||||
host_callback *mn10200_callback;
|
||||
int mn10200_debug;
|
||||
static SIM_OPEN_KIND sim_kind;
|
||||
static char *myname;
|
||||
|
||||
static void dispatch PARAMS ((uint32, uint32, int));
|
||||
static long hash PARAMS ((long));
|
||||
static void init_system PARAMS ((void));
|
||||
#define MAX_HASH 127
|
||||
|
||||
struct hash_entry
|
||||
{
|
||||
struct hash_entry *next;
|
||||
long opcode;
|
||||
long mask;
|
||||
struct simops *ops;
|
||||
#ifdef HASH_STAT
|
||||
unsigned long count;
|
||||
#endif
|
||||
};
|
||||
|
||||
int max_mem = 0;
|
||||
struct hash_entry hash_table[MAX_HASH+1];
|
||||
|
||||
|
||||
/* This probably doesn't do a very good job at bucket filling, but
|
||||
it's simple... */
|
||||
static INLINE long
|
||||
hash(insn)
|
||||
long insn;
|
||||
{
|
||||
/* These are one byte insns. */
|
||||
if ((insn & 0xffffff00) == 0x00)
|
||||
{
|
||||
if ((insn & 0xf0) != 0x80)
|
||||
return ((insn & 0xf0) >> 4) & 0x7f;
|
||||
|
||||
if ((insn & 0xf0) == 0x80
|
||||
&& (insn & 0x0c) >> 2 != (insn & 0x03))
|
||||
return (insn & 0xf0) & 0x7f;
|
||||
|
||||
return (insn & 0xff) & 0x7f;
|
||||
}
|
||||
|
||||
if ((insn & 0xffff0000) == 0)
|
||||
{
|
||||
if ((insn & 0xf000) == 0xd000)
|
||||
return ((insn & 0xfc00) >> 10) & 0x7f;
|
||||
|
||||
if ((insn & 0xf000) == 0xe000)
|
||||
return ((insn & 0xff00) >> 8) & 0x7f;
|
||||
|
||||
if ((insn & 0xf200) == 0xf200)
|
||||
return ((insn & 0xfff0) >> 4) & 0x7f;
|
||||
|
||||
if ((insn & 0xc000) == 0x4000
|
||||
|| (insn & 0xf000) == 0x8000)
|
||||
return ((insn & 0xf000) >> 8) & 0x7f;
|
||||
|
||||
if ((insn & 0xf200) == 0xf000)
|
||||
return ((insn & 0xffc0) >> 8) & 0x7f;
|
||||
|
||||
return ((insn & 0xff00) >> 8) & 0x7f;
|
||||
}
|
||||
|
||||
if ((insn & 0xff000000) == 0)
|
||||
{
|
||||
|
||||
if ((insn & 0xf00000) != 0xf00000
|
||||
|| (insn & 0xfc0000) == 0xf80000)
|
||||
return ((insn & 0xfc0000) >> 16) & 0x7f;
|
||||
|
||||
if ((insn & 0xff0000) == 0xf50000)
|
||||
return ((insn & 0xfff000) >> 12) & 0x7f;
|
||||
return ((insn & 0xff0000) >> 16) & 0x7f;
|
||||
}
|
||||
|
||||
return ((insn & 0xfff0000) >> 20) & 0x7f;
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
dispatch (insn, extension, length)
|
||||
uint32 insn;
|
||||
uint32 extension;
|
||||
int length;
|
||||
{
|
||||
struct hash_entry *h;
|
||||
|
||||
h = &hash_table[hash(insn)];
|
||||
|
||||
while ((insn & h->mask) != h->opcode
|
||||
|| (length != h->ops->length))
|
||||
{
|
||||
if (!h->next)
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback,
|
||||
"ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
|
||||
exit(1);
|
||||
}
|
||||
h = h->next;
|
||||
}
|
||||
|
||||
|
||||
#ifdef HASH_STAT
|
||||
h->count++;
|
||||
#endif
|
||||
|
||||
/* Now call the right function. */
|
||||
(h->ops->func)(insn, extension);
|
||||
PC += length;
|
||||
}
|
||||
|
||||
/* FIXME These would more efficient to use than load_mem/store_mem,
|
||||
but need to be changed to use the memory map. */
|
||||
|
||||
uint32
|
||||
get_word (x)
|
||||
uint8 *x;
|
||||
{
|
||||
uint8 *a = x;
|
||||
return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
|
||||
}
|
||||
|
||||
void
|
||||
put_word (addr, data)
|
||||
uint8 *addr;
|
||||
uint32 data;
|
||||
{
|
||||
uint8 *a = addr;
|
||||
a[0] = data & 0xff;
|
||||
a[1] = (data >> 8) & 0xff;
|
||||
a[2] = (data >> 16) & 0xff;
|
||||
a[3] = (data >> 24) & 0xff;
|
||||
}
|
||||
|
||||
void
|
||||
sim_size (power)
|
||||
int power;
|
||||
|
||||
{
|
||||
if (State.mem)
|
||||
free (State.mem);
|
||||
|
||||
max_mem = 1 << power;
|
||||
State.mem = (uint8 *) calloc (1, 1 << power);
|
||||
if (!State.mem)
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "Allocation of main memory failed.\n");
|
||||
exit (1);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
init_system ()
|
||||
{
|
||||
if (!State.mem)
|
||||
sim_size(19);
|
||||
}
|
||||
|
||||
int
|
||||
sim_write (sd,addr, buffer, size)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR addr;
|
||||
unsigned char *buffer;
|
||||
int size;
|
||||
{
|
||||
int i;
|
||||
|
||||
init_system ();
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
store_byte (addr + i, buffer[i]);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
/* Compare two opcode table entries for qsort. */
|
||||
static int
|
||||
compare_simops (arg1, arg2)
|
||||
const PTR arg1;
|
||||
const PTR arg2;
|
||||
{
|
||||
unsigned long code1 = ((struct simops *)arg1)->opcode;
|
||||
unsigned long code2 = ((struct simops *)arg2)->opcode;
|
||||
|
||||
if (code1 < code2)
|
||||
return -1;
|
||||
if (code2 < code1)
|
||||
return 1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
SIM_DESC
|
||||
sim_open (kind, cb, abfd, argv)
|
||||
SIM_OPEN_KIND kind;
|
||||
host_callback *cb;
|
||||
struct _bfd *abfd;
|
||||
char **argv;
|
||||
{
|
||||
struct simops *s;
|
||||
struct hash_entry *h;
|
||||
char **p;
|
||||
int i;
|
||||
|
||||
mn10200_callback = cb;
|
||||
|
||||
/* Sort the opcode array from smallest opcode to largest.
|
||||
This will generally improve simulator performance as the smaller
|
||||
opcodes are generally preferred to the larger opcodes. */
|
||||
for (i = 0, s = Simops; s->func; s++, i++)
|
||||
;
|
||||
qsort (Simops, i, sizeof (Simops[0]), compare_simops);
|
||||
|
||||
sim_kind = kind;
|
||||
myname = argv[0];
|
||||
|
||||
for (p = argv + 1; *p; ++p)
|
||||
{
|
||||
if (strcmp (*p, "-E") == 0)
|
||||
++p; /* ignore endian spec */
|
||||
else
|
||||
#ifdef DEBUG
|
||||
if (strcmp (*p, "-t") == 0)
|
||||
mn10200_debug = DEBUG;
|
||||
else
|
||||
#endif
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "ERROR: unsupported option(s): %s\n",*p);
|
||||
}
|
||||
|
||||
/* put all the opcodes in the hash table */
|
||||
for (s = Simops; s->func; s++)
|
||||
{
|
||||
h = &hash_table[hash(s->opcode)];
|
||||
|
||||
/* go to the last entry in the chain */
|
||||
while (h->next)
|
||||
{
|
||||
/* Don't insert the same opcode more than once. */
|
||||
if (h->opcode == s->opcode
|
||||
&& h->mask == s->mask
|
||||
&& h->ops == s)
|
||||
break;
|
||||
else
|
||||
h = h->next;
|
||||
}
|
||||
|
||||
/* Don't insert the same opcode more than once. */
|
||||
if (h->opcode == s->opcode
|
||||
&& h->mask == s->mask
|
||||
&& h->ops == s)
|
||||
continue;
|
||||
|
||||
if (h->ops)
|
||||
{
|
||||
h->next = calloc(1,sizeof(struct hash_entry));
|
||||
h = h->next;
|
||||
}
|
||||
h->ops = s;
|
||||
h->mask = s->mask;
|
||||
h->opcode = s->opcode;
|
||||
#ifdef HASH_STAT
|
||||
h->count = 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* fudge our descriptor for now */
|
||||
return (SIM_DESC) 1;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_set_profile (n)
|
||||
int n;
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile %d\n", n);
|
||||
}
|
||||
|
||||
void
|
||||
sim_set_profile_size (n)
|
||||
int n;
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_set_profile_size %d\n", n);
|
||||
}
|
||||
|
||||
int
|
||||
sim_stop (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
sim_resume (sd, step, siggnal)
|
||||
SIM_DESC sd;
|
||||
int step, siggnal;
|
||||
{
|
||||
uint32 inst;
|
||||
|
||||
if (step)
|
||||
State.exception = SIGTRAP;
|
||||
else
|
||||
State.exception = 0;
|
||||
|
||||
State.exited = 0;
|
||||
|
||||
do
|
||||
{
|
||||
unsigned long insn, extension;
|
||||
|
||||
/* Fetch the current instruction, fetch a double word to
|
||||
avoid redundant fetching for the common cases below. */
|
||||
inst = load_mem_big (PC, 2);
|
||||
|
||||
/* Using a giant case statement may seem like a waste because of the
|
||||
code/rodata size the table itself will consume. However, using
|
||||
a giant case statement speeds up the simulator by 10-15% by avoiding
|
||||
cascading if/else statements or cascading case statements. */
|
||||
switch ((inst >> 8) & 0xff)
|
||||
{
|
||||
/* All the single byte insns except 0x80, which must
|
||||
be handled specially. */
|
||||
case 0x00:
|
||||
case 0x01:
|
||||
case 0x02:
|
||||
case 0x03:
|
||||
case 0x04:
|
||||
case 0x05:
|
||||
case 0x06:
|
||||
case 0x07:
|
||||
case 0x08:
|
||||
case 0x09:
|
||||
case 0x0a:
|
||||
case 0x0b:
|
||||
case 0x0c:
|
||||
case 0x0d:
|
||||
case 0x0e:
|
||||
case 0x0f:
|
||||
case 0x10:
|
||||
case 0x11:
|
||||
case 0x12:
|
||||
case 0x13:
|
||||
case 0x14:
|
||||
case 0x15:
|
||||
case 0x16:
|
||||
case 0x17:
|
||||
case 0x18:
|
||||
case 0x19:
|
||||
case 0x1a:
|
||||
case 0x1b:
|
||||
case 0x1c:
|
||||
case 0x1d:
|
||||
case 0x1e:
|
||||
case 0x1f:
|
||||
case 0x20:
|
||||
case 0x21:
|
||||
case 0x22:
|
||||
case 0x23:
|
||||
case 0x24:
|
||||
case 0x25:
|
||||
case 0x26:
|
||||
case 0x27:
|
||||
case 0x28:
|
||||
case 0x29:
|
||||
case 0x2a:
|
||||
case 0x2b:
|
||||
case 0x2c:
|
||||
case 0x2d:
|
||||
case 0x2e:
|
||||
case 0x2f:
|
||||
case 0x30:
|
||||
case 0x31:
|
||||
case 0x32:
|
||||
case 0x33:
|
||||
case 0x34:
|
||||
case 0x35:
|
||||
case 0x36:
|
||||
case 0x37:
|
||||
case 0x38:
|
||||
case 0x39:
|
||||
case 0x3a:
|
||||
case 0x3b:
|
||||
case 0x3c:
|
||||
case 0x3d:
|
||||
case 0x3e:
|
||||
case 0x3f:
|
||||
case 0x90:
|
||||
case 0x91:
|
||||
case 0x92:
|
||||
case 0x93:
|
||||
case 0x94:
|
||||
case 0x95:
|
||||
case 0x96:
|
||||
case 0x97:
|
||||
case 0x98:
|
||||
case 0x99:
|
||||
case 0x9a:
|
||||
case 0x9b:
|
||||
case 0x9c:
|
||||
case 0x9d:
|
||||
case 0x9e:
|
||||
case 0x9f:
|
||||
case 0xa0:
|
||||
case 0xa1:
|
||||
case 0xa2:
|
||||
case 0xa3:
|
||||
case 0xa4:
|
||||
case 0xa5:
|
||||
case 0xa6:
|
||||
case 0xa7:
|
||||
case 0xa8:
|
||||
case 0xa9:
|
||||
case 0xaa:
|
||||
case 0xab:
|
||||
case 0xac:
|
||||
case 0xad:
|
||||
case 0xae:
|
||||
case 0xaf:
|
||||
case 0xb0:
|
||||
case 0xb1:
|
||||
case 0xb2:
|
||||
case 0xb3:
|
||||
case 0xb4:
|
||||
case 0xb5:
|
||||
case 0xb6:
|
||||
case 0xb7:
|
||||
case 0xb8:
|
||||
case 0xb9:
|
||||
case 0xba:
|
||||
case 0xbb:
|
||||
case 0xbc:
|
||||
case 0xbd:
|
||||
case 0xbe:
|
||||
case 0xbf:
|
||||
case 0xeb:
|
||||
case 0xf6:
|
||||
case 0xfe:
|
||||
case 0xff:
|
||||
insn = (inst >> 8) & 0xff;
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 1);
|
||||
break;
|
||||
|
||||
/* Special case as mov dX,dX really means mov imm8,dX. */
|
||||
case 0x80:
|
||||
case 0x85:
|
||||
case 0x8a:
|
||||
case 0x8f:
|
||||
/* Fetch the full instruction. */
|
||||
insn = inst;
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 2);
|
||||
break;
|
||||
|
||||
case 0x81:
|
||||
case 0x82:
|
||||
case 0x83:
|
||||
case 0x84:
|
||||
case 0x86:
|
||||
case 0x87:
|
||||
case 0x88:
|
||||
case 0x89:
|
||||
case 0x8b:
|
||||
case 0x8c:
|
||||
case 0x8d:
|
||||
case 0x8e:
|
||||
insn = (inst >> 8) & 0xff;
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 1);
|
||||
break;
|
||||
|
||||
/* And the two byte insns. */
|
||||
case 0x40:
|
||||
case 0x41:
|
||||
case 0x42:
|
||||
case 0x43:
|
||||
case 0x44:
|
||||
case 0x45:
|
||||
case 0x46:
|
||||
case 0x47:
|
||||
case 0x48:
|
||||
case 0x49:
|
||||
case 0x4a:
|
||||
case 0x4b:
|
||||
case 0x4c:
|
||||
case 0x4d:
|
||||
case 0x4e:
|
||||
case 0x4f:
|
||||
case 0x50:
|
||||
case 0x51:
|
||||
case 0x52:
|
||||
case 0x53:
|
||||
case 0x54:
|
||||
case 0x55:
|
||||
case 0x56:
|
||||
case 0x57:
|
||||
case 0x58:
|
||||
case 0x59:
|
||||
case 0x5a:
|
||||
case 0x5b:
|
||||
case 0x5c:
|
||||
case 0x5d:
|
||||
case 0x5e:
|
||||
case 0x5f:
|
||||
case 0x60:
|
||||
case 0x61:
|
||||
case 0x62:
|
||||
case 0x63:
|
||||
case 0x64:
|
||||
case 0x65:
|
||||
case 0x66:
|
||||
case 0x67:
|
||||
case 0x68:
|
||||
case 0x69:
|
||||
case 0x6a:
|
||||
case 0x6b:
|
||||
case 0x6c:
|
||||
case 0x6d:
|
||||
case 0x6e:
|
||||
case 0x6f:
|
||||
case 0x70:
|
||||
case 0x71:
|
||||
case 0x72:
|
||||
case 0x73:
|
||||
case 0x74:
|
||||
case 0x75:
|
||||
case 0x76:
|
||||
case 0x77:
|
||||
case 0x78:
|
||||
case 0x79:
|
||||
case 0x7a:
|
||||
case 0x7b:
|
||||
case 0x7c:
|
||||
case 0x7d:
|
||||
case 0x7e:
|
||||
case 0x7f:
|
||||
case 0xd0:
|
||||
case 0xd1:
|
||||
case 0xd2:
|
||||
case 0xd3:
|
||||
case 0xd4:
|
||||
case 0xd5:
|
||||
case 0xd6:
|
||||
case 0xd7:
|
||||
case 0xd8:
|
||||
case 0xd9:
|
||||
case 0xda:
|
||||
case 0xdb:
|
||||
case 0xe0:
|
||||
case 0xe1:
|
||||
case 0xe2:
|
||||
case 0xe3:
|
||||
case 0xe4:
|
||||
case 0xe5:
|
||||
case 0xe6:
|
||||
case 0xe7:
|
||||
case 0xe8:
|
||||
case 0xe9:
|
||||
case 0xea:
|
||||
case 0xf0:
|
||||
case 0xf1:
|
||||
case 0xf2:
|
||||
case 0xf3:
|
||||
/* Fetch the full instruction. */
|
||||
insn = inst;
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 2);
|
||||
break;
|
||||
|
||||
/* And the 3 byte insns with a 16bit operand in little
|
||||
endian format. */
|
||||
case 0xc0:
|
||||
case 0xc1:
|
||||
case 0xc2:
|
||||
case 0xc3:
|
||||
case 0xc4:
|
||||
case 0xc5:
|
||||
case 0xc6:
|
||||
case 0xc7:
|
||||
case 0xc8:
|
||||
case 0xc9:
|
||||
case 0xca:
|
||||
case 0xcb:
|
||||
case 0xcc:
|
||||
case 0xcd:
|
||||
case 0xce:
|
||||
case 0xcf:
|
||||
case 0xdc:
|
||||
case 0xdd:
|
||||
case 0xde:
|
||||
case 0xdf:
|
||||
case 0xec:
|
||||
case 0xed:
|
||||
case 0xee:
|
||||
case 0xef:
|
||||
case 0xf8:
|
||||
case 0xf9:
|
||||
case 0xfa:
|
||||
case 0xfb:
|
||||
case 0xfc:
|
||||
case 0xfd:
|
||||
insn = load_byte (PC);
|
||||
insn <<= 16;
|
||||
insn |= load_half (PC + 1);
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 3);
|
||||
break;
|
||||
|
||||
/* 3 byte insns without 16bit operand. */
|
||||
case 0xf5:
|
||||
insn = load_mem_big (PC, 3);
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 3);
|
||||
break;
|
||||
|
||||
/* 4 byte insns. */
|
||||
case 0xf7:
|
||||
insn = inst;
|
||||
insn <<= 16;
|
||||
insn |= load_half (PC + 2);
|
||||
extension = 0;
|
||||
dispatch (insn, extension, 4);
|
||||
break;
|
||||
|
||||
case 0xf4:
|
||||
insn = inst;
|
||||
insn <<= 16;
|
||||
insn |= load_mem_big (PC + 4, 1) << 8;
|
||||
insn |= load_mem_big (PC + 3, 1);
|
||||
extension = load_mem_big (PC + 2, 1);
|
||||
dispatch (insn, extension, 5);
|
||||
break;
|
||||
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
while (!State.exception);
|
||||
|
||||
#ifdef HASH_STAT
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < MAX_HASH; i++)
|
||||
{
|
||||
struct hash_entry *h;
|
||||
h = &hash_table[i];
|
||||
|
||||
printf("hash 0x%x:\n", i);
|
||||
|
||||
while (h)
|
||||
{
|
||||
printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
|
||||
h = h->next;
|
||||
}
|
||||
|
||||
printf("\n\n");
|
||||
}
|
||||
fflush (stdout);
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_close (sd, quitting)
|
||||
SIM_DESC sd;
|
||||
int quitting;
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
int
|
||||
sim_trace (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
#ifdef DEBUG
|
||||
mn10200_debug = DEBUG;
|
||||
#endif
|
||||
sim_resume (sd, 0, 0);
|
||||
return 1;
|
||||
}
|
||||
|
||||
void
|
||||
sim_info (sd, verbose)
|
||||
SIM_DESC sd;
|
||||
int verbose;
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "sim_info\n");
|
||||
}
|
||||
|
||||
SIM_RC
|
||||
sim_create_inferior (sd, abfd, argv, env)
|
||||
SIM_DESC sd;
|
||||
struct _bfd *abfd;
|
||||
char **argv;
|
||||
char **env;
|
||||
{
|
||||
if (abfd != NULL)
|
||||
PC = bfd_get_start_address (abfd);
|
||||
else
|
||||
PC = 0;
|
||||
return SIM_RC_OK;
|
||||
}
|
||||
|
||||
void
|
||||
sim_set_callbacks (p)
|
||||
host_callback *p;
|
||||
{
|
||||
mn10200_callback = p;
|
||||
}
|
||||
|
||||
/* All the code for exiting, signals, etc needs to be revamped.
|
||||
|
||||
This is enough to get c-torture limping though. */
|
||||
|
||||
void
|
||||
sim_stop_reason (sd, reason, sigrc)
|
||||
SIM_DESC sd;
|
||||
enum sim_stop *reason;
|
||||
int *sigrc;
|
||||
{
|
||||
if (State.exited)
|
||||
*reason = sim_exited;
|
||||
else
|
||||
*reason = sim_stopped;
|
||||
if (State.exception == SIGQUIT)
|
||||
*sigrc = 0;
|
||||
else
|
||||
*sigrc = State.exception;
|
||||
}
|
||||
|
||||
int
|
||||
sim_fetch_register (sd, rn, memory, length)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
int length;
|
||||
{
|
||||
put_word (memory, State.regs[rn]);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int
|
||||
sim_store_register (sd, rn, memory, length)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
int length;
|
||||
{
|
||||
State.regs[rn] = get_word (memory);
|
||||
return -1;
|
||||
}
|
||||
|
||||
int
|
||||
sim_read (sd, addr, buffer, size)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR addr;
|
||||
unsigned char *buffer;
|
||||
int size;
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < size; i++)
|
||||
buffer[i] = load_byte (addr + i);
|
||||
|
||||
return size;
|
||||
}
|
||||
|
||||
void
|
||||
sim_do_command (sd, cmd)
|
||||
SIM_DESC sd;
|
||||
char *cmd;
|
||||
{
|
||||
(*mn10200_callback->printf_filtered) (mn10200_callback, "\"%s\" is not a valid mn10200 simulator command.\n", cmd);
|
||||
}
|
||||
|
||||
SIM_RC
|
||||
sim_load (sd, prog, abfd, from_tty)
|
||||
SIM_DESC sd;
|
||||
char *prog;
|
||||
bfd *abfd;
|
||||
int from_tty;
|
||||
{
|
||||
extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
|
||||
bfd *prog_bfd;
|
||||
|
||||
prog_bfd = sim_load_file (sd, myname, mn10200_callback, prog, abfd,
|
||||
sim_kind == SIM_OPEN_DEBUG,
|
||||
0, sim_write);
|
||||
if (prog_bfd == NULL)
|
||||
return SIM_RC_FAIL;
|
||||
if (abfd == NULL)
|
||||
bfd_close (prog_bfd);
|
||||
return SIM_RC_OK;
|
||||
}
|
||||
297
sim/mn10200/mn10200_sim.h
Normal file
297
sim/mn10200/mn10200_sim.h
Normal file
@@ -0,0 +1,297 @@
|
||||
#include <stdio.h>
|
||||
#include <ctype.h>
|
||||
#include "ansidecl.h"
|
||||
#include "callback.h"
|
||||
#include "opcode/mn10200.h"
|
||||
#include <limits.h>
|
||||
#include "remote-sim.h"
|
||||
|
||||
#ifndef INLINE
|
||||
#ifdef __GNUC__
|
||||
#define INLINE inline
|
||||
#else
|
||||
#define INLINE
|
||||
#endif
|
||||
#endif
|
||||
|
||||
extern host_callback *mn10200_callback;
|
||||
|
||||
#define DEBUG_TRACE 0x00000001
|
||||
#define DEBUG_VALUES 0x00000002
|
||||
|
||||
extern int mn10200_debug;
|
||||
|
||||
#ifdef __STDC__
|
||||
#define SIGNED signed
|
||||
#else
|
||||
#define SIGNED
|
||||
#endif
|
||||
|
||||
#if UCHAR_MAX == 255
|
||||
typedef unsigned char uint8;
|
||||
typedef SIGNED char int8;
|
||||
#else
|
||||
error "Char is not an 8-bit type"
|
||||
#endif
|
||||
|
||||
#if SHRT_MAX == 32767
|
||||
typedef unsigned short uint16;
|
||||
typedef SIGNED short int16;
|
||||
#else
|
||||
error "Short is not a 16-bit type"
|
||||
#endif
|
||||
|
||||
#if INT_MAX == 2147483647
|
||||
|
||||
typedef unsigned int uint32;
|
||||
typedef SIGNED int int32;
|
||||
|
||||
#else
|
||||
# if LONG_MAX == 2147483647
|
||||
|
||||
typedef unsigned long uint32;
|
||||
typedef SIGNED long int32;
|
||||
|
||||
# else
|
||||
error "Neither int nor long is a 32-bit type"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
typedef uint32 reg_t;
|
||||
|
||||
struct simops
|
||||
{
|
||||
long opcode;
|
||||
long mask;
|
||||
void (*func)();
|
||||
int length;
|
||||
int format;
|
||||
int numops;
|
||||
int operands[16];
|
||||
};
|
||||
|
||||
/* The current state of the processor; registers, memory, etc. */
|
||||
|
||||
struct _state
|
||||
{
|
||||
reg_t regs[11]; /* registers, d0-d3, a0-a3, pc, mdr, psw */
|
||||
uint8 *mem; /* main memory */
|
||||
int exception; /* Actually a signal number. */
|
||||
int exited; /* Did the program exit? */
|
||||
} State;
|
||||
|
||||
extern uint32 OP[4];
|
||||
extern struct simops Simops[];
|
||||
|
||||
#define PC (State.regs[8])
|
||||
|
||||
#define PSW (State.regs[10])
|
||||
#define PSW_ZF 0x1
|
||||
#define PSW_NF 0x2
|
||||
#define PSW_CF 0x4
|
||||
#define PSW_VF 0x8
|
||||
#define PSW_ZX 0x10
|
||||
#define PSW_NX 0x20
|
||||
#define PSW_CX 0x40
|
||||
#define PSW_VX 0x80
|
||||
|
||||
#define REG_D0 0
|
||||
#define REG_A0 4
|
||||
#define REG_SP 7
|
||||
#define REG_PC 8
|
||||
#define REG_MDR 9
|
||||
#define REG_PSW 10
|
||||
|
||||
#define SEXT3(x) ((((x)&0x7)^(~0x3))+0x4)
|
||||
|
||||
/* sign-extend a 4-bit number */
|
||||
#define SEXT4(x) ((((x)&0xf)^(~0x7))+0x8)
|
||||
|
||||
/* sign-extend a 5-bit number */
|
||||
#define SEXT5(x) ((((x)&0x1f)^(~0xf))+0x10)
|
||||
|
||||
/* sign-extend an 8-bit number */
|
||||
#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
|
||||
|
||||
/* sign-extend a 9-bit number */
|
||||
#define SEXT9(x) ((((x)&0x1ff)^(~0xff))+0x100)
|
||||
|
||||
/* sign-extend a 16-bit number */
|
||||
#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
|
||||
|
||||
/* sign-extend a 22-bit number */
|
||||
#define SEXT22(x) ((((x)&0x3fffff)^(~0x1fffff))+0x200000)
|
||||
|
||||
/* sign-extend a 24-bit number */
|
||||
#define SEXT24(x) ((((x)&0xffffff)^(~0x7fffff))+0x800000)
|
||||
|
||||
#ifdef _WIN32
|
||||
#define SIGTRAP 5
|
||||
#define SIGQUIT 3
|
||||
#endif
|
||||
|
||||
extern int max_mem;
|
||||
|
||||
#define load_mem_big(addr,len) \
|
||||
(len == 1 ? *(((addr) & 0xffffff) + State.mem) : \
|
||||
len == 2 ? ((*(((addr) & 0xffffff) + State.mem) << 8) \
|
||||
| *((((addr) + 1) & 0xffffff) + State.mem)) : \
|
||||
((*(((addr) & 0xffffff) + State.mem) << 16) \
|
||||
| (*((((addr) + 1) & 0xffffff) + State.mem) << 8) \
|
||||
| *((((addr) + 2) & 0xffffff) + State.mem)))
|
||||
|
||||
static INLINE uint32
|
||||
load_byte (addr)
|
||||
SIM_ADDR addr;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
return p[0];
|
||||
}
|
||||
|
||||
static INLINE uint32
|
||||
load_half (addr)
|
||||
SIM_ADDR addr;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
return p[1] << 8 | p[0];
|
||||
}
|
||||
|
||||
static INLINE uint32
|
||||
load_3_byte (addr)
|
||||
SIM_ADDR addr;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
return p[2] << 16 | p[1] << 8 | p[0];
|
||||
}
|
||||
|
||||
static INLINE uint32
|
||||
load_word (addr)
|
||||
SIM_ADDR addr;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
|
||||
}
|
||||
|
||||
static INLINE uint32
|
||||
load_mem (addr, len)
|
||||
SIM_ADDR addr;
|
||||
int len;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
switch (len)
|
||||
{
|
||||
case 1:
|
||||
return p[0];
|
||||
case 2:
|
||||
return p[1] << 8 | p[0];
|
||||
case 3:
|
||||
return p[2] << 16 | p[1] << 8 | p[0];
|
||||
case 4:
|
||||
return p[3] << 24 | p[2] << 16 | p[1] << 8 | p[0];
|
||||
default:
|
||||
abort ();
|
||||
}
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
store_byte (addr, data)
|
||||
SIM_ADDR addr;
|
||||
uint32 data;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
p[0] = data;
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
store_half (addr, data)
|
||||
SIM_ADDR addr;
|
||||
uint32 data;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
p[0] = data;
|
||||
p[1] = data >> 8;
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
store_3_byte (addr, data)
|
||||
SIM_ADDR addr;
|
||||
uint32 data;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
p[0] = data;
|
||||
p[1] = data >> 8;
|
||||
p[2] = data >> 16;
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
store_word (addr, data)
|
||||
SIM_ADDR addr;
|
||||
uint32 data;
|
||||
{
|
||||
uint8 *p = (addr & 0xffffff) + State.mem;
|
||||
|
||||
#ifdef CHECK_ADDR
|
||||
if ((addr & 0xffffff) > max_mem)
|
||||
abort ();
|
||||
#endif
|
||||
|
||||
p[0] = data;
|
||||
p[1] = data >> 8;
|
||||
p[2] = data >> 16;
|
||||
p[3] = data >> 24;
|
||||
}
|
||||
|
||||
/* Function declarations. */
|
||||
|
||||
uint32 get_word PARAMS ((uint8 *));
|
||||
void put_word PARAMS ((uint8 *, uint32));
|
||||
|
||||
extern uint8 *map PARAMS ((SIM_ADDR addr));
|
||||
2449
sim/mn10200/simops.c
Normal file
2449
sim/mn10200/simops.c
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user