forked from Imagelibrary/binutils-gdb
Initial creation of sourceware repository
This commit is contained in:
Stan Shebs
526
sim/erc32/interf.c
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526
sim/erc32/interf.c
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@@ -0,0 +1,526 @@
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/*
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* This file is part of SIS.
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*
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* SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler,
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* European Space Agency
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*
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* This program is free software; you can redistribute it and/or modify it under
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* the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 675
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* Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <signal.h>
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#include <string.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <time.h>
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#include <sys/fcntl.h>
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#include "sis.h"
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#include "bfd.h"
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#include <dis-asm.h>
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#include "sim-config.h"
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#include "remote-sim.h"
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#ifndef fprintf
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extern fprintf();
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#endif
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#define PSR_CWP 0x7
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#define VAL(x) strtol(x,(char **)NULL,0)
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extern char **buildargv(char *input);
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extern struct disassemble_info dinfo;
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extern struct pstate sregs;
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extern struct estate ebase;
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extern int current_target_byte_order;
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extern int ctrl_c;
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extern int nfp;
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extern int ift;
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extern int rom8;
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extern int wrp;
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extern int uben;
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extern int sis_verbose;
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extern char *sis_version;
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extern struct estate ebase;
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extern struct evcell evbuf[];
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extern struct irqcell irqarr[];
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extern int irqpend, ext_irl;
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extern int sparclite;
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extern int dumbio;
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extern int sparclite_board;
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extern int termsave;
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extern char uart_dev1[], uart_dev2[];
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int sis_gdb_break = 1;
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host_callback *sim_callback;
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int
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run_sim(sregs, icount, dis)
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struct pstate *sregs;
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unsigned int icount;
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int dis;
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{
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int mexc, irq;
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if (sis_verbose)
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(*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
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sregs->pc);
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init_stdio();
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sregs->starttime = time(NULL);
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irq = 0;
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while (!sregs->err_mode & (icount > 0)) {
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sregs->fhold = 0;
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sregs->hold = 0;
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sregs->icnt = 1;
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if (sregs->psr & 0x080)
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sregs->asi = 8;
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else
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sregs->asi = 9;
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#if 0 /* DELETE ME! for debugging purposes only */
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if (sis_verbose > 1)
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if (sregs->pc == 0 || sregs->npc == 0)
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printf ("bogus pc or npc\n");
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#endif
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mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst,
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2, &sregs->hold);
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#if 1 /* DELETE ME! for debugging purposes only */
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if (sis_verbose > 2)
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printf("pc %x, np %x, sp %x, fp %x, wm %x, cw %x, i %08x\n",
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sregs->pc, sregs->npc,
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sregs->r[(((sregs->psr & 7) << 4) + 14) & 0x7f],
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sregs->r[(((sregs->psr & 7) << 4) + 30) & 0x7f],
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sregs->wim,
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sregs->psr & 7,
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sregs->inst);
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#endif
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if (sregs->annul) {
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sregs->annul = 0;
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sregs->icnt = 1;
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sregs->pc = sregs->npc;
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sregs->npc = sregs->npc + 4;
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} else {
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if (ext_irl) irq = check_interrupts(sregs);
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if (!irq) {
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if (mexc) {
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sregs->trap = I_ACC_EXC;
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} else {
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if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
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if (sis_verbose)
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(*sim_callback->printf_filtered) (sim_callback,
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"SW BP hit at %x\n", sregs->pc);
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sim_halt();
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restore_stdio();
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clearerr(stdin);
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return (BPT_HIT);
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} else
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dispatch_instruction(sregs);
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}
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icount--;
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}
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if (sregs->trap) {
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irq = 0;
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sregs->err_mode = execute_trap(sregs);
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}
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}
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advance_time(sregs);
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if (ctrl_c) {
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icount = 0;
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}
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}
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sim_halt();
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sregs->tottime += time(NULL) - sregs->starttime;
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restore_stdio();
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clearerr(stdin);
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if (sregs->err_mode)
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error_mode(sregs->pc);
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if (sregs->err_mode)
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return (ERROR);
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if (sregs->bphit) {
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if (sis_verbose)
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(*sim_callback->printf_filtered) (sim_callback,
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"HW BP hit at %x\n", sregs->pc);
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return (BPT_HIT);
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}
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if (ctrl_c) {
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ctrl_c = 0;
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return (CTRL_C);
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}
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return (TIME_OUT);
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}
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void
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sim_set_callbacks (ptr)
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host_callback *ptr;
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{
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sim_callback = ptr;
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}
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void
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sim_size (memsize)
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int memsize;
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{
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}
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SIM_DESC
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sim_open (kind, callback, abfd, argv)
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SIM_OPEN_KIND kind;
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struct host_callback_struct *callback;
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struct _bfd *abfd;
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char **argv;
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{
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int argc = 0;
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int stat = 1;
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int freq = 0;
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sim_callback = callback;
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while (argv[argc])
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argc++;
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while (stat < argc) {
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if (argv[stat][0] == '-') {
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if (strcmp(argv[stat], "-v") == 0) {
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sis_verbose++;
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} else
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if (strcmp(argv[stat], "-nfp") == 0) {
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nfp = 1;
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} else
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if (strcmp(argv[stat], "-ift") == 0) {
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ift = 1;
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} else
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if (strcmp(argv[stat], "-sparclite") == 0) {
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sparclite = 1;
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} else
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if (strcmp(argv[stat], "-sparclite-board") == 0) {
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sparclite_board = 1;
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} else
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if (strcmp(argv[stat], "-dumbio") == 0) {
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dumbio = 1;
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} else
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if (strcmp(argv[stat], "-wrp") == 0) {
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wrp = 1;
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} else
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if (strcmp(argv[stat], "-rom8") == 0) {
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rom8 = 1;
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} else
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if (strcmp(argv[stat], "-uben") == 0) {
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uben = 1;
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} else
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if (strcmp(argv[stat], "-uart1") == 0) {
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if ((stat + 1) < argc)
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strcpy(uart_dev1, argv[++stat]);
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} else
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if (strcmp(argv[stat], "-uart2") == 0) {
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if ((stat + 1) < argc)
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strcpy(uart_dev2, argv[++stat]);
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} else
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if (strcmp(argv[stat], "-nogdb") == 0) {
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sis_gdb_break = 0;
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} else
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if (strcmp(argv[stat], "-freq") == 0) {
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if ((stat + 1) < argc) {
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freq = VAL(argv[++stat]);
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}
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} else {
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(*sim_callback->printf_filtered) (sim_callback,
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"unknown option %s\n",
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argv[stat]);
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}
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} else
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bfd_load(argv[stat]);
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stat++;
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}
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if (sis_verbose) {
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(*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
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(*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
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if (nfp)
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(*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
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if (sparclite)
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(*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
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if (dumbio)
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(*sim_callback->printf_filtered) (sim_callback, "dumb IO (no input, dumb output)\n");
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if (sis_gdb_break == 0)
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(*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
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if (freq)
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(*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
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}
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sregs.freq = freq ? freq : 15;
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termsave = fcntl(0, F_GETFL, 0);
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INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf);
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dinfo.endian = BFD_ENDIAN_BIG;
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reset_all();
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ebase.simtime = 0;
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init_sim();
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init_bpt(&sregs);
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reset_stat(&sregs);
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/* Fudge our descriptor for now. */
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return (SIM_DESC) 1;
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}
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void
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sim_close(sd, quitting)
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SIM_DESC sd;
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int quitting;
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{
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exit_sim();
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fcntl(0, F_SETFL, termsave);
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};
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SIM_RC
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sim_load(sd, prog, abfd, from_tty)
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SIM_DESC sd;
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char *prog;
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bfd *abfd;
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int from_tty;
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{
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bfd_load (prog);
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return SIM_RC_OK;
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}
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SIM_RC
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sim_create_inferior(sd, abfd, argv, env)
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SIM_DESC sd;
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struct _bfd *abfd;
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char **argv;
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char **env;
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{
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bfd_vma start_address = 0;
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if (abfd != NULL)
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start_address = bfd_get_start_address (abfd);
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ebase.simtime = 0;
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reset_all();
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reset_stat(&sregs);
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sregs.pc = start_address & ~3;
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sregs.npc = sregs.pc + 4;
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return SIM_RC_OK;
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}
|
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int
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sim_store_register(sd, regno, value, length)
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SIM_DESC sd;
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int regno;
|
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unsigned char *value;
|
||||
int length;
|
||||
{
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||||
/* FIXME: Review the computation of regval. */
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int regval;
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||||
if (current_target_byte_order == BIG_ENDIAN)
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regval = (value[0] << 24) | (value[1] << 16)
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||||
| (value[2] << 8) | value[3];
|
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else
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regval = (value[3] << 24) | (value[2] << 16)
|
||||
| (value[1] << 8) | value[0];
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set_regi(&sregs, regno, regval);
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return -1;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sim_fetch_register(sd, regno, buf, length)
|
||||
SIM_DESC sd;
|
||||
int regno;
|
||||
unsigned char *buf;
|
||||
int length;
|
||||
{
|
||||
get_regi(&sregs, regno, buf);
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||||
return -1;
|
||||
}
|
||||
|
||||
int
|
||||
sim_write(sd, mem, buf, length)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR mem;
|
||||
unsigned char *buf;
|
||||
int length;
|
||||
{
|
||||
return (sis_memory_write(mem, buf, length));
|
||||
}
|
||||
|
||||
int
|
||||
sim_read(sd, mem, buf, length)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR mem;
|
||||
unsigned char *buf;
|
||||
int length;
|
||||
{
|
||||
return (sis_memory_read(mem, buf, length));
|
||||
}
|
||||
|
||||
void
|
||||
sim_info(sd, verbose)
|
||||
SIM_DESC sd;
|
||||
int verbose;
|
||||
{
|
||||
show_stat(&sregs);
|
||||
}
|
||||
|
||||
int simstat = OK;
|
||||
|
||||
void
|
||||
sim_stop_reason(sd, reason, sigrc)
|
||||
SIM_DESC sd;
|
||||
enum sim_stop * reason;
|
||||
int *sigrc;
|
||||
{
|
||||
|
||||
switch (simstat) {
|
||||
case CTRL_C:
|
||||
*reason = sim_stopped;
|
||||
*sigrc = SIGINT;
|
||||
break;
|
||||
case OK:
|
||||
case TIME_OUT:
|
||||
case BPT_HIT:
|
||||
*reason = sim_stopped;
|
||||
#ifdef _WIN32
|
||||
#define SIGTRAP 5
|
||||
#endif
|
||||
*sigrc = SIGTRAP;
|
||||
break;
|
||||
case ERROR:
|
||||
*sigrc = 0;
|
||||
*reason = sim_exited;
|
||||
}
|
||||
ctrl_c = 0;
|
||||
simstat = OK;
|
||||
}
|
||||
|
||||
/* Flush all register windows out to the stack. Starting after the invalid
|
||||
window, flush all windows up to, and including the current window. This
|
||||
allows GDB to do backtraces and look at local variables for frames that
|
||||
are still in the register windows. Note that strictly speaking, this
|
||||
behavior is *wrong* for several reasons. First, it doesn't use the window
|
||||
overflow handlers. It therefore assumes standard frame layouts and window
|
||||
handling policies. Second, it changes system state behind the back of the
|
||||
target program. I expect this to mainly pose problems when debugging trap
|
||||
handlers.
|
||||
*/
|
||||
|
||||
static void
|
||||
flush_windows ()
|
||||
{
|
||||
int invwin;
|
||||
int cwp;
|
||||
int win;
|
||||
int ws;
|
||||
|
||||
/* Keep current window handy */
|
||||
|
||||
cwp = sregs.psr & PSR_CWP;
|
||||
|
||||
/* Calculate the invalid window from the wim. */
|
||||
|
||||
for (invwin = 0; invwin <= PSR_CWP; invwin++)
|
||||
if ((sregs.wim >> invwin) & 1)
|
||||
break;
|
||||
|
||||
/* Start saving with the window after the invalid window. */
|
||||
|
||||
invwin = (invwin - 1) & PSR_CWP;
|
||||
|
||||
for (win = invwin; ; win = (win - 1) & PSR_CWP)
|
||||
{
|
||||
uint32 sp;
|
||||
int i;
|
||||
|
||||
sp = sregs.r[(win * 16 + 14) & 0x7f];
|
||||
#if 1
|
||||
if (sis_verbose > 2) {
|
||||
uint32 fp = sregs.r[(win * 16 + 30) & 0x7f];
|
||||
printf("flush_window: win %d, sp %x, fp %x\n", win, sp, fp);
|
||||
}
|
||||
#endif
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
|
||||
&ws);
|
||||
|
||||
if (win == cwp)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
sim_resume(SIM_DESC sd, int step, int siggnal)
|
||||
{
|
||||
simstat = run_sim(&sregs, -1, 0);
|
||||
|
||||
if (sis_gdb_break) flush_windows ();
|
||||
}
|
||||
|
||||
int
|
||||
sim_trace (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
/* FIXME: unfinished */
|
||||
sim_resume (sd, 0, 0);
|
||||
return 1;
|
||||
}
|
||||
|
||||
void
|
||||
sim_do_command(sd, cmd)
|
||||
SIM_DESC sd;
|
||||
char *cmd;
|
||||
{
|
||||
exec_cmd(&sregs, cmd);
|
||||
}
|
||||
|
||||
#if 0 /* FIXME: These shouldn't exist. */
|
||||
|
||||
int
|
||||
sim_insert_breakpoint(int addr)
|
||||
{
|
||||
if (sregs.bptnum < BPT_MAX) {
|
||||
sregs.bpts[sregs.bptnum] = addr & ~0x3;
|
||||
sregs.bptnum++;
|
||||
if (sis_verbose)
|
||||
(*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
|
||||
return 0;
|
||||
} else
|
||||
return 1;
|
||||
}
|
||||
|
||||
int
|
||||
sim_remove_breakpoint(int addr)
|
||||
{
|
||||
int i = 0;
|
||||
|
||||
while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
|
||||
i++;
|
||||
if (addr == sregs.bpts[i]) {
|
||||
for (; i < sregs.bptnum - 1; i++)
|
||||
sregs.bpts[i] = sregs.bpts[i + 1];
|
||||
sregs.bptnum -= 1;
|
||||
if (sis_verbose)
|
||||
(*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
|
||||
return 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user