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sim: riscv: switch to new target-newlib-syscall

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Use the new target-newlib-syscall module.  This is needed to merge all
the architectures into a single build, and riscv has a custom syscall
table for its newlib/libgloss port.
This commit is contained in:
Mike Frysinger
2021-11-28 00:23:16 -05:00
parent ab230d13fc
commit c8c6ef3807
2 changed files with 2 additions and 3 deletions
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2
sim/riscv/interp.c
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@@ -24,6 +24,7 @@
#include "sim/callback.h"
#include "sim-main.h"
#include "sim-options.h"
#include "target-newlib-syscall.h"
void
sim_engine_run (SIM_DESC sd,
@@ -69,6 +70,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback,
STATE_MACHS (sd) = riscv_sim_machs;
STATE_MODEL_NAME (sd) = WITH_TARGET_WORD_BITSIZE == 32 ? "RV32G" : "RV64G";
current_target_byte_order = BFD_ENDIAN_LITTLE;
callback->syscall_map = cb_riscv_syscall_map;
/* The cpu data is kept in a separately allocated chunk of memory. */
if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)