forked from Imagelibrary/binutils-gdb
Change management of tdesc_arch_data
While working on something else, I noticed that tdesc_data_cleanup took a void* parameter. Looking more into this, I found that tdesc_use_registers expected a transfer of ownership. I think it's better to express this sort of thing via the type system, when possible. This patch changes tdesc_data_alloc to return a unique pointer, changes tdesc_use_registers to accept an rvalue reference, and then adapts all the users. Note that a deleter structure is introduced to avoid having to move tdesc_arch_data to the header file. 2020-09-17 Tom Tromey <tromey@adacore.com> * tic6x-tdep.c (tic6x_gdbarch_init): Update. * target-descriptions.h (struct tdesc_arch_data_deleter): New. (tdesc_arch_data_up): New typedef. (tdesc_use_registers, tdesc_data_alloc): Update. (tdesc_data_cleanup): Don't declare. * target-descriptions.c (tdesc_data_alloc): Return a tdesc_arch_data_up. (tdesc_arch_data_deleter::operator()): Rename from tdesc_data_cleanup. Change argument type. (tdesc_use_registers): Change early_data to an rvalue reference. (tdesc_use_registers): Don't use delete. * sparc-tdep.c (sparc32_gdbarch_init): Update. * s390-tdep.c (s390_gdbarch_init): Update. * rx-tdep.c (rx_gdbarch_init): Update. * rs6000-tdep.c (rs6000_gdbarch_init): Update. * riscv-tdep.c (riscv_gdbarch_init): Update. * or1k-tdep.c (or1k_gdbarch_init): Update. * nios2-tdep.c (nios2_gdbarch_init): Update. * nds32-tdep.c (nds32_gdbarch_init): Update. * mips-tdep.c (mips_gdbarch_init): Update. * microblaze-tdep.c (microblaze_gdbarch_init): Update. * m68k-tdep.c (m68k_gdbarch_init): Update. * i386-tdep.c (i386_gdbarch_init): Update. * arm-tdep.c (arm_gdbarch_init): Update. * arc-tdep.c (arc_tdesc_init): Update. (arc_gdbarch_init): Update. * aarch64-tdep.c (aarch64_gdbarch_init): Update.
This commit is contained in:
Tom Tromey
@@ -8047,7 +8047,7 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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enum mips_abi mips_abi, found_abi, wanted_abi;
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int i, num_regs;
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enum mips_fpu_type fpu_type;
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struct tdesc_arch_data *tdesc_data = NULL;
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tdesc_arch_data_up tdesc_data;
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int elf_fpu_type = Val_GNU_MIPS_ABI_FP_ANY;
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const char * const *reg_names;
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struct mips_regnum mips_regnum, *regnum;
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@@ -8310,73 +8310,58 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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valid_p = 1;
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for (i = MIPS_ZERO_REGNUM; i <= MIPS_RA_REGNUM; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
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mips_gprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.lo, "lo");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.hi, "hi");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.pc, "pc");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.cp0");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.badvaddr, "badvaddr");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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MIPS_PS_REGNUM, "status");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.cause, "cause");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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/* FIXME drow/2007-05-17: The FPU should be optional. The MIPS
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backend is not prepared for that, though. */
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feature = tdesc_find_feature (info.target_desc,
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"org.gnu.gdb.mips.fpu");
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if (feature == NULL)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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valid_p = 1;
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for (i = 0; i < 32; i++)
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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i + mips_regnum.fp0, mips_fprs[i]);
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.fp_control_status,
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"fcsr");
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valid_p
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&= tdesc_numbered_register (feature, tdesc_data,
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&= tdesc_numbered_register (feature, tdesc_data.get (),
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mips_regnum.fp_implementation_revision,
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"fir");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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num_regs = mips_regnum.fp_implementation_revision + 1;
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@@ -8389,27 +8374,24 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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{
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i = 0;
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valid_p = 1;
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "hi1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "lo1");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "hi2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "lo2");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "hi3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspacc + i++, "lo3");
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valid_p &= tdesc_numbered_register (feature, tdesc_data,
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valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
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dspctl, "dspctl");
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if (!valid_p)
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{
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tdesc_data_cleanup (tdesc_data);
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return NULL;
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}
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return NULL;
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mips_regnum.dspacc = dspacc;
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mips_regnum.dspctl = dspctl;
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@@ -8445,8 +8427,6 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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if (MIPS_FPU_TYPE (arches->gdbarch) != fpu_type)
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continue;
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if (tdesc_data != NULL)
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tdesc_data_cleanup (tdesc_data);
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return arches->gdbarch;
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}
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@@ -8743,7 +8723,7 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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mips_register_g_packet_guesses (gdbarch);
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/* Hook in OS ABI-specific overrides, if they have been registered. */
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info.tdesc_data = tdesc_data;
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info.tdesc_data = tdesc_data.get ();
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gdbarch_init_osabi (info, gdbarch);
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/* The hook may have adjusted num_regs, fetch the final value and
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@@ -8764,10 +8744,10 @@ mips_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
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frame_base_append_sniffer (gdbarch, mips_micro_frame_base_sniffer);
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frame_base_append_sniffer (gdbarch, mips_insn32_frame_base_sniffer);
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if (tdesc_data)
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if (tdesc_data != nullptr)
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{
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set_tdesc_pseudo_register_type (gdbarch, mips_pseudo_register_type);
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tdesc_use_registers (gdbarch, info.target_desc, tdesc_data);
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tdesc_use_registers (gdbarch, info.target_desc, std::move (tdesc_data));
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/* Override the normal target description methods to handle our
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dual real and pseudo registers. */
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