forked from Imagelibrary/binutils-gdb
bfd/
* elf32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for R_MIPS_PC16. (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16. (bfd_elf32_bfd_reloc_type_lookup): Don't handle BFD_RELOC_16_PCREL_S2. * elf64-mips.c (mips_elf64_howto_table_rel): Use rightshift 2 for R_MIPS_PC16. (mips_elf64_howto_table_rela): Likewise. (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16. (bfd_elf64_bfd_reloc_type_lookup): Don't handle BFD_RELOC_16_PCREL_S2. * elfn32-mips.c (elf_mips_howto_table_rel): Use rightshift 2 for R_MIPS_PC16. (elf_mips_howto_table_rela): Likewise. (mips_reloc_map): Map BFD_RELOC_16_PCREL_S2 to R_MIPS_PC16. (bfd_elf32_bfd_reloc_type_lookup): Don't handle BFD_RELOC_16_PCREL_S2. * elfxx-mips.c: Formatting fixes. (mips_elf_calculate_relocation): Handle R_MIPS_GNU_REL16_S2 and R_MIPS_PC16 identically. gas/ * config/tc-mips.c (append_insn): Handle BFD_RELOC_16_PCREL_S2. (macro_build): Complain for invalid branch displacements. (mips_validate_fix): Delete. (md_apply_fix): Re-add pcrel support for branches. Use consistent text for misaligned branch targets. (tc_gen_reloc: Re-add pcrel support for branches. Handle strange BFD pcrel processing. Remove error for unresolved branches. * config/tc-mips.h (TC_VALIDATE_FIX, mips_validate_fix): Delete. gas/testsuite/ * gas/mips/bge.d, gas/mips/bge.s, gas/mips/bgeu.d, gas/mips/bgeu.s, gas/mips/blt.d, gas/mips/blt.s, gas/mips/bltu.d, gas/mips/bltu.s: Reactivate external branch tests. * gas/mips/branch-misc-2.d, gas/mips/branch-misc-2pic.d, gas/mips/branch-misc-2-64.d, gas/mips/branch-misc-2pic-64.d: New tests. * gas/mips/branch-misc-2.l, gas/mips/branch-misc-2pic.l, gas/testsuite/gas/mips/branch-misc-2pic.s: Remove. * gas/mips/mips.exp: Adjust branch-misc-2 tests. Add 64-bit variants.
This commit is contained in:
Daniel Jacobowitz
@@ -2410,7 +2410,16 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
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break;
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case BFD_RELOC_16_PCREL_S2:
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goto need_reloc;
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if ((address_expr->X_add_number & 3) != 0)
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as_bad (_("branch to misaligned address (0x%lx)"),
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(unsigned long) address_expr->X_add_number);
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if (mips_relax_branch)
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goto need_reloc;
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if ((address_expr->X_add_number + 0x20000) & ~0x3ffff)
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as_bad (_("branch address range overflow (0x%lx)"),
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(unsigned long) address_expr->X_add_number);
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ip->insn_opcode |= (address_expr->X_add_number >> 2) & 0xffff;
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break;
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default:
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internalError ();
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@@ -3139,15 +3148,22 @@ macro_build (expressionS *ep, const char *name, const char *fmt, ...)
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case 'p':
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assert (ep != NULL);
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/*
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* This allows macro() to pass an immediate expression for
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* creating short branches without creating a symbol.
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* Note that the expression still might come from the assembly
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* input, in which case the value is not checked for range nor
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* is a relocation entry generated (yuck).
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*
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* We don't allow branch relaxation for these branches, as
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* they should only appear in ".set nomacro" anyway.
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*/
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if (ep->X_op == O_constant)
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{
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if ((ep->X_add_number & 3) != 0)
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as_bad (_("branch to misaligned address (0x%lx)"),
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(unsigned long) ep->X_add_number);
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if ((ep->X_add_number + 0x20000) & ~0x3ffff)
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as_bad (_("branch address range overflow (0x%lx)"),
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(unsigned long) ep->X_add_number);
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insn.insn_opcode |= (ep->X_add_number >> 2) & 0xffff;
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ep = NULL;
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}
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@@ -11361,83 +11377,6 @@ mips_force_relocation (fixS *fixp)
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return 0;
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}
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/* This hook is called before a fix is simplified. We don't really
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decide whether to skip a fix here. Rather, we turn global symbols
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used as branch targets into local symbols, such that they undergo
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simplification. We can only do this if the symbol is defined and
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it is in the same section as the branch. If this doesn't hold, we
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emit a better error message than just saying the relocation is not
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valid for the selected object format.
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FIXP is the fix-up we're going to try to simplify, SEG is the
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segment in which the fix up occurs. The return value should be
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non-zero to indicate the fix-up is valid for further
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simplifications. */
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int
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mips_validate_fix (struct fix *fixP, asection *seg)
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{
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/* There's a lot of discussion on whether it should be possible to
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use R_MIPS_PC16 to represent branch relocations. The outcome
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seems to be that it can, but gas/bfd are very broken in creating
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RELA relocations for this, so for now we only accept branches to
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symbols in the same section. Anything else is of dubious value,
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since there's no guarantee that at link time the symbol would be
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in range. Even for branches to local symbols this is arguably
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wrong, since it we assume the symbol is not going to be
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overridden, which should be possible per ELF library semantics,
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but then, there isn't a dynamic relocation that could be used to
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this effect, and the target would likely be out of range as well.
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Unfortunately, it seems that there is too much code out there
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that relies on branches to symbols that are global to be resolved
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as if they were local, like the IRIX tools do, so we do it as
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well, but with a warning so that people are reminded to fix their
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code. If we ever get back to using R_MIPS_PC16 for branch
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targets, this entire block should go away (and probably the
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whole function). */
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if (fixP->fx_r_type == BFD_RELOC_16_PCREL_S2
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&& ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour
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|| OUTPUT_FLAVOR == bfd_target_elf_flavour)
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|| bfd_reloc_type_lookup (stdoutput, BFD_RELOC_16_PCREL_S2) == NULL)
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&& fixP->fx_addsy)
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{
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if (! S_IS_DEFINED (fixP->fx_addsy))
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{
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("Cannot branch to undefined symbol."));
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/* Avoid any further errors about this fixup. */
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fixP->fx_done = 1;
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}
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else if (S_GET_SEGMENT (fixP->fx_addsy) != seg)
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{
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("Cannot branch to symbol in another section."));
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fixP->fx_done = 1;
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}
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else if (S_IS_EXTERNAL (fixP->fx_addsy))
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{
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symbolS *sym = fixP->fx_addsy;
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if (mips_pic == SVR4_PIC)
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as_warn_where (fixP->fx_file, fixP->fx_line,
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_("Pretending global symbol used as branch target is local."));
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fixP->fx_addsy = symbol_create (S_GET_NAME (sym),
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S_GET_SEGMENT (sym),
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S_GET_VALUE (sym),
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symbol_get_frag (sym));
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copy_symbol_attributes (fixP->fx_addsy, sym);
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S_CLEAR_EXTERNAL (fixP->fx_addsy);
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assert (symbol_resolved_p (sym));
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symbol_mark_resolved (fixP->fx_addsy);
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}
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}
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return 1;
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}
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/* Apply a fixup to the object file. */
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void
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@@ -11462,7 +11401,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where);
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assert (! fixP->fx_pcrel);
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assert (! fixP->fx_pcrel || fixP->fx_r_type == BFD_RELOC_16_PCREL_S2);
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/* Don't treat parts of a composite relocation as done. There are two
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reasons for this:
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@@ -11474,7 +11413,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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constants. The easiest way of dealing with the pathological
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exceptions is to generate a relocation against STN_UNDEF and
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leave everything up to the linker. */
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if (fixP->fx_addsy == NULL && fixP->fx_tcbit == 0)
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if (fixP->fx_addsy == NULL && ! fixP->fx_pcrel && fixP->fx_tcbit == 0)
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fixP->fx_done = 1;
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switch (fixP->fx_r_type)
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@@ -11519,7 +11458,6 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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case BFD_RELOC_MIPS16_GPREL:
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case BFD_RELOC_MIPS16_HI16:
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case BFD_RELOC_MIPS16_HI16_S:
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assert (! fixP->fx_pcrel);
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/* Nothing needed to do. The value comes from the reloc entry */
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break;
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@@ -11589,7 +11527,7 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
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case BFD_RELOC_16_PCREL_S2:
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if ((*valP & 0x3) != 0)
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as_bad_where (fixP->fx_file, fixP->fx_line,
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_("Branch to odd address (%lx)"), (long) *valP);
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_("Branch to misaligned address (%lx)"), (long) *valP);
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/*
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* We need to save the bits in the instruction since fixup_segment()
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@@ -13307,8 +13245,24 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
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*reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
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reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
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assert (! fixp->fx_pcrel);
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reloc->addend = fixp->fx_addnumber;
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if (fixp->fx_pcrel)
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{
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assert (fixp->fx_r_type == BFD_RELOC_16_PCREL_S2);
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/* At this point, fx_addnumber is "symbol offset - pcrel address".
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Relocations want only the symbol offset. */
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reloc->addend = fixp->fx_addnumber + reloc->address;
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if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
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{
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/* A gruesome hack which is a result of the gruesome gas
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reloc handling. What's worse, for COFF (as opposed to
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ECOFF), we might need yet another copy of reloc->address.
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See bfd_install_relocation. */
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reloc->addend += reloc->address;
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}
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}
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else
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reloc->addend = fixp->fx_addnumber;
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/* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable
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entry to be used in the relocation's section offset. */
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@@ -13320,18 +13274,7 @@ tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
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code = fixp->fx_r_type;
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/* To support a PC relative reloc, we used a Cygnus extension.
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We check for that here to make sure that we don't let such a
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reloc escape normally. (FIXME: This was formerly used by
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embedded-PIC support, but is now used by branch handling in
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general. That probably should be fixed.) */
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if ((OUTPUT_FLAVOR == bfd_target_ecoff_flavour
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|| OUTPUT_FLAVOR == bfd_target_elf_flavour)
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&& code == BFD_RELOC_16_PCREL_S2)
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reloc->howto = NULL;
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else
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reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
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reloc->howto = bfd_reloc_type_lookup (stdoutput, code);
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if (reloc->howto == NULL)
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{
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as_bad_where (fixp->fx_file, fixp->fx_line,
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@@ -13408,8 +13351,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
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exp.X_add_number = fragp->fr_offset;
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fixp = fix_new_exp (fragp, buf - (bfd_byte *)fragp->fr_literal,
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4, &exp, 1,
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BFD_RELOC_16_PCREL_S2);
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4, &exp, 1, BFD_RELOC_16_PCREL_S2);
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fixp->fx_file = fragp->fr_file;
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fixp->fx_line = fragp->fr_line;
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