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Fix compile time warnings generated when compiling with clang.

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bfd	* bout.c (b_out_slurp_reloc_table): Cast constant to unsigned in
	order to avoid problems with left shifting negative values.
	(abs32code): Likewise.
	* mach-o.c (FILE_ALIGN): Likewise.
	* coff-rs6000.c (xcoff_debug_sections): Delete unused static
	array.
	* elf32-visium.c (visium_reloc_map): Likewise.
	* elf32-arm.c (elf32_arm_final_link_relocate): Remove useless
	calls to abs function.
	* elf32-frv.c (_frvfdpic_relax_tls_entries): Likewise.
	* elf32-score.c (score_elf_final_link_relocate): Likewise.
	* elf32-score7.c (score_elf_final_link_relocate): Likewise.
	* elf32-i860.c (i860_howto_pc26_reloc): Use multiplication instead
	of shifting to create a negative mask.
	* elf32-msp430.c (elf_backend_special_sections): Define.
	* elfxx-mips.c (got_ofst_reloc_p): Delete unused function.
	(got_hi16_reloc_p): Delete unused function.
	* ppcboot.c (ppcboot_bfd_print_private_bfd_data): Fix test of
	partition name.

gas	* config/tc-ppc.c (insn_validate): Cast PPC_OPSHIFT_INV to an int.

opcode	* ppc.h (PPC_OPSHIFT_INV): Use an unsigned constant when left
	shifting.

ld	* emultempl/elf32.em (ehdr_start_empty): New static variable.
	(before_allocation): Use it to initialise ehdr_start_save.
	* emultempl/pe.em (write_build_id): Remove useless double
	parenthesis.
	* emultempl/pep.em (write_build_id): Likewise.

opcodes	* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
	function.
	* tic30-dis.c (print_branch): Likewise.
	* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
	value before left shifting.
	* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
	* hppa-dis.c (print_insn_hppa): Likewise.
	* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
	array.
	* msp430-dis.c (msp430_singleoperand): Likewise.
	(msp430_doubleoperand): Likewise.
	(print_insn_msp430): Likewise.
	* nds32-asm.c (parse_operand): Likewise.
	* sh-opc.h (MASK): Likewise.
	* v850-dis.c (get_operand_value): Likewise.
This commit is contained in:
Nick Clifton
2015-09-23 18:05:16 +01:00
parent 6a40cf0c5c
commit b6518b3871
32 changed files with 133 additions and 142 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
opcodes/ChangeLog
View File

@@ -1,3 +1,21 @@
2015-09-23 Nick Clifton <nickc@redhat.com>
* bfin-dis.c (fmtconst): Remove unnecessary call to the abs
function.
* tic30-dis.c (print_branch): Likewise.
* cgen-asm.c (cgen_parse_signed_integer): Cast integer to signed
value before left shifting.
* fr30-ibld.c (fr30_cgen_extract_operand): Likewise.
* hppa-dis.c (print_insn_hppa): Likewise.
* mips-dis.c (mips_cp0sel_names_mipsr5900): Delete unused static
array.
* msp430-dis.c (msp430_singleoperand): Likewise.
(msp430_doubleoperand): Likewise.
(print_insn_msp430): Likewise.
* nds32-asm.c (parse_operand): Likewise.
* sh-opc.h (MASK): Likewise.
* v850-dis.c (get_operand_value): Likewise.
2015-09-22 Nick Clifton <nickc@redhat.com>
* rx-decode.opc (bwl): Use RX_Bad_Size.

2
opcodes/bfin-dis.c
View File

@@ -167,7 +167,7 @@ fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf)
else
{
if (constant_formats[cf].issigned && x < 0)
sprintf (buf, "-0x%x", abs (x));
sprintf (buf, "-0x%lx", (unsigned long)(- x));
else
sprintf (buf, "0x%lx", (unsigned long) x);
}

2
opcodes/cgen-asm.c
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@@ -280,7 +280,7 @@ cgen_parse_signed_integer (CGEN_CPU_DESC cd,
&& value > 0
&& (value & 0x80000000)
&& ((value >> 31) == 1))
value |= -1 << 31;
value |= ((bfd_vma) -1) << 31;
*valuep = value;
}

2
opcodes/fr30-ibld.c
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@@ -874,7 +874,7 @@ fr30_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 4, 16, total_length, pc, & value);
value = ((value) | (((-1) << (4))));
value = ((value) | (((-1UL) << (4))));
fields->f_m4 = value;
}
break;

4
opcodes/hppa-dis.c
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@@ -1103,7 +1103,7 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
int disp;
if (sign)
disp = (-1 << 10) | imm10;
disp = (-1U << 10) | imm10;
else
disp = imm10;
@@ -1119,7 +1119,7 @@ print_insn_hppa (bfd_vma memaddr, disassemble_info *info)
int disp;
if (sign)
disp = (-1 << 11) | imm11;
disp = (-1U << 11) | imm11;
else
disp = imm11;

12
opcodes/mips-dis.c
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@@ -157,18 +157,6 @@ static const char * const mips_cp0_names_r5900[32] =
"c0_taglo", "c0_taghi", "c0_errorepc", "$31"
};
static const struct mips_cp0sel_name mips_cp0sel_names_mipsr5900[] =
{
{ 24, 2, "c0_iab" },
{ 24, 3, "c0_iabm" },
{ 24, 4, "c0_dab" },
{ 24, 5, "c0_dabm" },
{ 24, 6, "c0_dvb" },
{ 24, 7, "c0_dvbm" },
{ 25, 1, "c0_perfcnt,1" },
{ 25, 2, "c0_perfcnt,2" }
};
static const char * const mips_cp0_names_mips3264[32] =
{
"c0_index", "c0_random", "c0_entrylo0", "c0_entrylo1",

38
opcodes/msp430-dis.c
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@@ -229,10 +229,10 @@ msp430_singleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
}
else if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
sprintf (op, "%d(r%d)", dst, regd);
}
}
@@ -273,7 +273,7 @@ msp430_singleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
sprintf (op, "#%d", dst);
if (dst > 9 || dst < 0)
sprintf (comm, "#0x%05x", dst);
@@ -328,10 +328,10 @@ msp430_singleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
}
else if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
sprintf (op, "%d(r%d)", dst, regd);
if (dst > 9 || dst < 0)
sprintf (comm, "%05x", dst);
@@ -431,7 +431,7 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
sprintf (op1, "0x%05x", dst & 0xfffff);
sprintf (comm1, "PC rel. 0x%05lx",
(long)((addr + 2 + dst) & 0xfffff));
@@ -462,10 +462,10 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
}
else if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
cmd_len += 4;
*cycles = 6;
sprintf (op1, "%d(r%d)", dst, regd);
@@ -523,7 +523,7 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_src << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
sprintf (op1, "#%d", dst);
if (dst > 9 || dst < 0)
sprintf (comm1, "0x%05x", dst & 0xfffff);
@@ -547,7 +547,7 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_src << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
sprintf (op1, "0x%05x", dst & 0xfffff);
sprintf (comm1, "PC rel. 0x%05lx",
(long) ((addr + 2 + dst) & 0xfffff));
@@ -584,10 +584,10 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_src << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
}
else if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
sprintf (op1, "%d(r%d)", dst, regs);
if (dst > 9 || dst < -9)
sprintf (comm1, "0x%05x", dst);
@@ -629,7 +629,7 @@ msp430_doubleoperand (disassemble_info *info,
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
sprintf (op2, "0x%05x", dst & 0xfffff);
sprintf (comm2, "PC rel. 0x%05lx",
(long)((addr + cmd_len + dst) & 0xfffff));
@@ -653,14 +653,14 @@ msp430_doubleoperand (disassemble_info *info,
dst = msp430dis_opcode (addr + cmd_len, info);
cmd_len += 2;
if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
if (dst > 9 || dst < 0)
sprintf (comm2, "0x%04x", PS (dst));
if (extension_word)
{
dst |= extended_dst << 16;
if (dst & 0x80000)
dst |= -1 << 20;
dst |= -1U << 20;
if (dst > 9 || dst < 0)
sprintf (comm2, "0x%05x", dst & 0xfffff);
}
@@ -759,7 +759,7 @@ msp430_branchinstr (disassemble_info *info,
dst = msp430dis_opcode (addr + 2, info);
cmd_len += 2;
if (dst & 0x8000)
dst |= -1 << 16;
dst |= -1U << 16;
sprintf (op1, "%d(r%d)", dst, regs);
}
}
@@ -1013,7 +1013,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
reg = n;
n = msp430dis_opcode (addr + 2, info);
if (n & 0x8000)
n |= -1 << 16;
n |= -1U << 16;
sprintf (op1, "%d(r%d)", n, reg);
if (n > 9 || n < 0)
{
@@ -1040,7 +1040,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
sprintf (op1, "r%d", n);
n = msp430dis_opcode (addr + 2, info);
if (n & 0x8000)
n |= -1 << 16;
n |= -1U << 16;
sprintf (op2, "%d(r%d)", n, reg);
if (n > 9 || n < 0)
{
@@ -1057,7 +1057,7 @@ print_insn_msp430 (bfd_vma addr, disassemble_info *info)
n <<= 16;
n |= msp430dis_opcode (addr + 2, info);
if (n & 0x80000)
n |= -1 << 20;
n |= -1U << 20;
sprintf (op1, "#%d", n);
if (n > 9 || n < 0)
sprintf (comm1, "0x%05x", n);

2
opcodes/nds32-asm.c
View File

@@ -2086,7 +2086,7 @@ done:
{
/* Sign-ext the value. */
if (((value >> 32) == 0) && (value & 0x80000000))
value |= (int64_t) -1 << 31;
value |= (int64_t) -1U << 31;
/* Shift the value to positive domain. */

8
opcodes/sh-opc.h
View File

@@ -201,10 +201,10 @@ typedef enum
sh_dsp_reg_nums;
/* Return a mask with bits LO to HI (inclusive) set. */
#define MASK(LO,HI) ( LO < 1 ? ((1 << (HI + 1)) - 1) \
: HI > 30 ? (-1 << LO) \
: LO == HI ? (1 << LO) \
: (((1 << (HI + 1)) - 1) & (-1 << LO)))
#define MASK(LO,HI) ( LO < 1 ? ((1U << (HI + 1)) - 1) \
: HI > 30 ? (-1U << LO) \
: LO == HI ? (1U << LO) \
: (((1U << (HI + 1)) - 1) & (-1U << LO)))
#define arch_sh1_base (1 << 0)
#define arch_sh2_base (1 << 1)

4
opcodes/tic30-dis.c
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@@ -669,9 +669,9 @@ print_branch (disassemble_info *info,
if (address == 0)
info->fprintf_func (info->stream, " <%s>", sym->name);
else
info->fprintf_func (info->stream, " <%s %c %d>", sym->name,
info->fprintf_func (info->stream, " <%s %c %lu>", sym->name,
((short) address < 0) ? '-' : '+',
abs (address));
address);
}
return 1;
}

2
opcodes/v850-dis.c
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@@ -152,7 +152,7 @@ get_operand_value (const struct v850_operand *operand,
if (operand->flags & V850E_IMMEDIATE16HI)
value <<= 16;
else if (value & 0x8000)
value |= (-1L << 16);
value |= (-1UL << 16);
return value;
}