RISC-V: Support CFI Zicfiss and Zicfilp instructions and CSR.

https://github.com/riscv/riscv-cfi/releases/tag/v1.0 This patch only support the CFI instructions and CSR in assembler.
2025-01-17 09:53:00 +08:00
parent 1d458f0843
commit b4681c2e8a
21 changed files with 259 additions and 0 deletions
--- a/include/opcode/riscv.h
+++ b/include/opcode/riscv.h
@@ -515,6 +515,9 @@ enum riscv_insn_class
  INSN_CLASS_ZVKNHA_OR_ZVKNHB,
  INSN_CLASS_ZVKSED,
  INSN_CLASS_ZVKSH,
+  INSN_CLASS_ZICFISS,
+  INSN_CLASS_ZICFISS_AND_ZCMOP,
+  INSN_CLASS_ZICFILP,
  INSN_CLASS_ZCB,
  INSN_CLASS_ZCB_AND_ZBA,
  INSN_CLASS_ZCB_AND_ZBB,