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MIPS16/opcodes: Keep the LSB of PC-relative offsets in disassembly

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Correct the disassembly of the PC-relative immediate argument of the
MIPS16 synthetic LA, LW, DLA and LD instructions and do not mask the
LSB, which in this case is a part of the data address rather than the
ISA bit and has to be fully presented.

	opcodes/
	* mips-dis.c (print_insn_arg): Only clear the ISA bit for jumps
	and branches and not synthetic data instructions.

	binutils/
	* testsuite/binutils-all/mips/mips16-undecoded.d: Adjust the
	disassembly of PC-relative LA and LW synthetic instructions.
This commit is contained in:
Maciej W. Rozycki
2017-05-02 11:53:30 +01:00
parent 39ff1b79f6
commit a4ddc54ec1
4 changed files with 24 additions and 13 deletions
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7
opcodes/mips-dis.c
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@@ -1281,9 +1281,10 @@ print_insn_arg (struct disassemble_info *info,
pcrel_op = (const struct mips_pcrel_operand *) operand;
info->target = mips_decode_pcrel_operand (pcrel_op, base_pc, uval);
/* Preserve the ISA bit for the GDB disassembler,
otherwise clear it. */
if (info->flavour != bfd_target_unknown_flavour)
/* For jumps and branches clear the ISA bit except for
the GDB disassembler. */
if (pcrel_op->include_isa_bit
&& info->flavour != bfd_target_unknown_flavour)
info->target &= -2;
(*info->print_address_func) (info->target, info);