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aarch64: Add system registers for 2024 MPAM extension

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This patch adds support for new system registers introduced in the
2024 MPAM extension (Memory Partitioning and Monitoring):

Available in Armv9.3-A:
  MPAMBW0_EL1,
  MPAMBW1_EL1,
  MPAMBW1_EL12,
  MPAMBW2_EL2,
  MPAMBW3_EL3,
  MPAMBWCAP_EL2,
  MPAMBWIDR_EL1

Available in Armv9.3-A with SME:
  MPAMBWSM_EL1

The details can be found in [1].

[1]: https://developer.arm.com/documentation/ddi0601/latest
This commit is contained in:
Yury Khrustalev
2025-06-06 10:58:05 +01:00
parent c97cba49cf
commit a23ef19dec
8 changed files with 67 additions and 0 deletions
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10
gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.d Normal file
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@@ -0,0 +1,10 @@
#as: -march=armv9.3-a+sme
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
.*: d538a5e0 mrs x0, mpambwsm_el1
.*: d518a5e0 msr mpambwsm_el1, x0

2
gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sme-sysregs.s Normal file
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@@ -0,0 +1,2 @@
mrs x0, mpambwsm_el1
msr mpambwsm_el1, x0

21
gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.d Normal file
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@@ -0,0 +1,21 @@
#as: -march=armv9.3-a
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
[^:]+:\s+d538a5a0 mrs x0, mpambw0_el1
[^:]+:\s+d518a5a0 msr mpambw0_el1, x0
[^:]+:\s+d538a580 mrs x0, mpambw1_el1
[^:]+:\s+d518a580 msr mpambw1_el1, x0
[^:]+:\s+d53da580 mrs x0, mpambw1_el12
[^:]+:\s+d51da580 msr mpambw1_el12, x0
[^:]+:\s+d53ca580 mrs x0, mpambw2_el2
[^:]+:\s+d51ca580 msr mpambw2_el2, x0
[^:]+:\s+d53ea580 mrs x0, mpambw3_el3
[^:]+:\s+d51ea580 msr mpambw3_el3, x0
[^:]+:\s+d53ca5c0 mrs x0, mpambwcap_el2
[^:]+:\s+d51ca5c0 msr mpambwcap_el2, x0
[^:]+:\s+d538a4a0 mrs x0, mpambwidr_el1

13
gas/testsuite/gas/aarch64/sysreg/armv9_3-a-sysregs.s Normal file
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@@ -0,0 +1,13 @@
mrs x0, mpambw0_el1
msr mpambw0_el1, x0
mrs x0, mpambw1_el1
msr mpambw1_el1, x0
mrs x0, mpambw1_el12
msr mpambw1_el12, x0
mrs x0, mpambw2_el2
msr mpambw2_el2, x0
mrs x0, mpambw3_el3
msr mpambw3_el3, x0
mrs x0, mpambwcap_el2
msr mpambwcap_el2, x0
mrs x0, mpambwidr_el1

3
gas/testsuite/gas/aarch64/sysreg/mpam-bad.d Normal file
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@@ -0,0 +1,3 @@
#as: -march=armv9.3-a
#source: mpam-bad.s
#error_output: mpam-bad.l

4
gas/testsuite/gas/aarch64/sysreg/mpam-bad.l Normal file
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@@ -0,0 +1,4 @@
.*: Assembler messages:
.*: Warning: specified register cannot be written to at operand 1 -- `msr mpambwidr_el1,x0'
.*: Error: selected processor does not support system register name 'mpambwsm_el1'
.*: Error: selected processor does not support system register name 'mpambwsm_el1'

6
gas/testsuite/gas/aarch64/sysreg/mpam-bad.s Normal file
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@@ -0,0 +1,6 @@
/* This is read-only register */
msr mpambwidr_el1, x0
/* This register is not available without +sme flag */
mrs x0, mpambwsm_el1
msr mpambwsm_el1, x0

8
opcodes/aarch64-sys-regs.def
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@@ -591,6 +591,14 @@
SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, AARCH64_NO_FEATURES) SYSREG ("mpam1_el12", CPENC (3,5,10,5,0), 0, AARCH64_NO_FEATURES)
SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, AARCH64_NO_FEATURES) SYSREG ("mpam2_el2", CPENC (3,4,10,5,0), 0, AARCH64_NO_FEATURES)
SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, AARCH64_NO_FEATURES) SYSREG ("mpam3_el3", CPENC (3,6,10,5,0), 0, AARCH64_NO_FEATURES)
SYSREG ("mpambw0_el1", CPENC (3,0,10,5,5), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambw1_el1", CPENC (3,0,10,5,4), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambw1_el12", CPENC (3,5,10,5,4), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambw2_el2", CPENC (3,4,10,5,4), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambw3_el3", CPENC (3,6,10,5,4), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambwcap_el2", CPENC (3,4,10,5,6), F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambwidr_el1", CPENC (3,0,10,4,5), F_REG_READ|F_ARCHEXT, AARCH64_FEATURE (V9_3A))
SYSREG ("mpambwsm_el1", CPENC (3,0,10,5,7), F_ARCHEXT, AARCH64_FEATURES (2, SME, V9_3A))
SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_NO_FEATURES) SYSREG ("mpamhcr_el2", CPENC (3,4,10,4,0), 0, AARCH64_NO_FEATURES)
SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_NO_FEATURES) SYSREG ("mpamidr_el1", CPENC (3,0,10,4,4), F_REG_READ, AARCH64_NO_FEATURES)
SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), F_ARCHEXT, AARCH64_FEATURE (SME)) SYSREG ("mpamsm_el1", CPENC (3,0,10,5,3), F_ARCHEXT, AARCH64_FEATURE (SME))