forked from Imagelibrary/binutils-gdb
import gdb-1999-0519
This commit is contained in:
Jason Molenda
624
gdb/sh-stub.c
624
gdb/sh-stub.c
@@ -1,8 +1,8 @@
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/* sh-stub.c -- debugging stub for the Hitachi-SH.
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/* sh-stub.c -- debugging stub for the Hitachi-SH.
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NOTE!! This code has to be compiled with optimization, otherwise the
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function inlining which generates the exception handlers won't work.
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*/
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/* This is originally based on an m68k software stub written by Glenn
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@@ -147,33 +147,37 @@
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#include <string.h>
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#include <setjmp.h>
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/* Hitachi SH architecture instruction encoding masks */
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#define COND_BR_MASK 0xff00
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#define UCOND_DBR_MASK 0xe000
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#define UCOND_RBR_MASK 0xf0df
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#define TRAPA_MASK 0xff00
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#define COND_BR_MASK 0xff00
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#define UCOND_DBR_MASK 0xe000
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#define UCOND_RBR_MASK 0xf0df
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#define TRAPA_MASK 0xff00
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#define COND_DISP 0x00ff
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#define UCOND_DISP 0x0fff
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#define UCOND_REG 0x0f00
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#define COND_DISP 0x00ff
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#define UCOND_DISP 0x0fff
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#define UCOND_REG 0x0f00
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/* Hitachi SH instruction opcodes */
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#define BF_INSTR 0x8b00
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#define BT_INSTR 0x8900
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#define BRA_INSTR 0xa000
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#define BSR_INSTR 0xb000
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#define JMP_INSTR 0x402b
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#define JSR_INSTR 0x400b
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#define RTS_INSTR 0x000b
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#define RTE_INSTR 0x002b
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#define TRAPA_INSTR 0xc300
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#define BF_INSTR 0x8b00
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#define BT_INSTR 0x8900
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#define BRA_INSTR 0xa000
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#define BSR_INSTR 0xb000
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#define JMP_INSTR 0x402b
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#define JSR_INSTR 0x400b
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#define RTS_INSTR 0x000b
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#define RTE_INSTR 0x002b
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#define TRAPA_INSTR 0xc300
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#define SSTEP_INSTR 0xc3ff
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#define SSTEP_INSTR 0xc3ff
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/* Hitachi SH processor register masks */
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#define T_BIT_MASK 0x0001
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#define T_BIT_MASK 0x0001
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/*
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* BUFMAX defines the maximum number of characters in inbound/outbound
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* buffers at least NUMREGBYTES*2 are needed for register packets
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* buffers. At least NUMREGBYTES*2 are needed for register packets.
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*/
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#define BUFMAX 1024
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@@ -228,23 +232,10 @@ void breakpoint (void);
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int init_stack[init_stack_size] __attribute__ ((section ("stack"))) = {0};
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int stub_stack[stub_stack_size] __attribute__ ((section ("stack"))) = {0};
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typedef struct
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{
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void (*func_cold) ();
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int *stack_cold;
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void (*func_warm) ();
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int *stack_warm;
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void (*(handler[256 - 4])) ();
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}
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vec_type;
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void INIT ();
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void BINIT ();
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/* When you link take care that this is at address 0 -
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or wherever your vbr points */
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#define CPU_BUS_ERROR_VEC 9
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#define DMA_BUS_ERROR_VEC 10
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#define NMI_VEC 11
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@@ -255,270 +246,6 @@ void BINIT ();
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#define USER_VEC 255
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#define BCR (*(volatile short *)(0x05FFFFA0)) /* Bus control register */
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#define BAS (0x800) /* Byte access select */
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#define WCR1 (*(volatile short *)(0x05ffffA2)) /* Wait state control register */
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const vec_type vectable =
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{
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&BINIT, /* 0: Power-on reset PC */
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init_stack + init_stack_size, /* 1: Power-on reset SP */
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&BINIT, /* 2: Manual reset PC */
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init_stack + init_stack_size, /* 3: Manual reset SP */
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{
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&catch_exception_4, /* 4: General invalid instruction */
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&catch_exception_random, /* 5: Reserved for system */
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&catch_exception_6, /* 6: Invalid slot instruction */
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&catch_exception_random, /* 7: Reserved for system */
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&catch_exception_random, /* 8: Reserved for system */
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&catch_exception_9, /* 9: CPU bus error */
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&catch_exception_10, /* 10: DMA bus error */
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&catch_exception_11, /* 11: NMI */
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&catch_exception_random, /* 12: User break */
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&catch_exception_random, /* 13: Reserved for system */
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&catch_exception_random, /* 14: Reserved for system */
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&catch_exception_random, /* 15: Reserved for system */
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&catch_exception_random, /* 16: Reserved for system */
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&catch_exception_random, /* 17: Reserved for system */
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&catch_exception_random, /* 18: Reserved for system */
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&catch_exception_random, /* 19: Reserved for system */
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&catch_exception_random, /* 20: Reserved for system */
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&catch_exception_random, /* 21: Reserved for system */
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&catch_exception_random, /* 22: Reserved for system */
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&catch_exception_random, /* 23: Reserved for system */
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&catch_exception_random, /* 24: Reserved for system */
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&catch_exception_random, /* 25: Reserved for system */
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&catch_exception_random, /* 26: Reserved for system */
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&catch_exception_random, /* 27: Reserved for system */
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&catch_exception_random, /* 28: Reserved for system */
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&catch_exception_random, /* 29: Reserved for system */
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&catch_exception_random, /* 30: Reserved for system */
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&catch_exception_random, /* 31: Reserved for system */
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&catch_exception_32, /* 32: Trap instr (user vectors) */
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&catch_exception_33, /* 33: Trap instr (user vectors) */
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&catch_exception_random, /* 34: Trap instr (user vectors) */
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&catch_exception_random, /* 35: Trap instr (user vectors) */
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&catch_exception_random, /* 36: Trap instr (user vectors) */
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&catch_exception_random, /* 37: Trap instr (user vectors) */
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&catch_exception_random, /* 38: Trap instr (user vectors) */
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&catch_exception_random, /* 39: Trap instr (user vectors) */
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&catch_exception_random, /* 40: Trap instr (user vectors) */
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&catch_exception_random, /* 41: Trap instr (user vectors) */
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&catch_exception_random, /* 42: Trap instr (user vectors) */
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&catch_exception_random, /* 43: Trap instr (user vectors) */
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&catch_exception_random, /* 44: Trap instr (user vectors) */
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&catch_exception_random, /* 45: Trap instr (user vectors) */
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&catch_exception_random, /* 46: Trap instr (user vectors) */
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&catch_exception_random, /* 47: Trap instr (user vectors) */
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&catch_exception_random, /* 48: Trap instr (user vectors) */
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&catch_exception_random, /* 49: Trap instr (user vectors) */
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&catch_exception_random, /* 50: Trap instr (user vectors) */
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&catch_exception_random, /* 51: Trap instr (user vectors) */
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&catch_exception_random, /* 52: Trap instr (user vectors) */
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&catch_exception_random, /* 53: Trap instr (user vectors) */
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&catch_exception_random, /* 54: Trap instr (user vectors) */
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&catch_exception_random, /* 55: Trap instr (user vectors) */
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&catch_exception_random, /* 56: Trap instr (user vectors) */
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&catch_exception_random, /* 57: Trap instr (user vectors) */
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&catch_exception_random, /* 58: Trap instr (user vectors) */
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&catch_exception_random, /* 59: Trap instr (user vectors) */
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&catch_exception_random, /* 60: Trap instr (user vectors) */
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&catch_exception_random, /* 61: Trap instr (user vectors) */
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&catch_exception_random, /* 62: Trap instr (user vectors) */
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&catch_exception_random, /* 63: Trap instr (user vectors) */
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&catch_exception_random, /* 64: IRQ0 */
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&catch_exception_random, /* 65: IRQ1 */
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&catch_exception_random, /* 66: IRQ2 */
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&catch_exception_random, /* 67: IRQ3 */
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&catch_exception_random, /* 68: IRQ4 */
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&catch_exception_random, /* 69: IRQ5 */
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&catch_exception_random, /* 70: IRQ6 */
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&catch_exception_random, /* 71: IRQ7 */
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
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&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_255}};
|
||||
|
||||
|
||||
char in_nmi; /* Set when handling an NMI, so we don't reenter */
|
||||
int dofault; /* Non zero, bus errors will raise exception */
|
||||
@@ -1085,6 +812,306 @@ breakpoint (void)
|
||||
BREAKPOINT ();
|
||||
}
|
||||
|
||||
/**** Processor-specific routines start here ****/
|
||||
/**** Processor-specific routines start here ****/
|
||||
/**** Processor-specific routines start here ****/
|
||||
|
||||
/* Note:
|
||||
|
||||
The Hitachi SH family uses two exception architectures:
|
||||
|
||||
SH1 & SH2:
|
||||
|
||||
These processors utilize an exception vector table.
|
||||
Exceptions are vectored to the address stored at VBR + (exception_num * 4)
|
||||
|
||||
SH3, SH3E, & SH4:
|
||||
|
||||
These processors have fixed entry points relative to the VBR for
|
||||
various exception classes.
|
||||
*/
|
||||
|
||||
#if defined(__sh1__) || defined(__sh2__)
|
||||
|
||||
/* SH1/SH2 exception vector table format */
|
||||
|
||||
typedef struct
|
||||
{
|
||||
void (*func_cold) ();
|
||||
int *stack_cold;
|
||||
void (*func_warm) ();
|
||||
int *stack_warm;
|
||||
void (*(handler[256 - 4])) ();
|
||||
}
|
||||
vec_type;
|
||||
|
||||
/* vectable is the SH1/SH2 vector table. It must be at address 0
|
||||
or wherever your vbr points. */
|
||||
|
||||
const vec_type vectable =
|
||||
{
|
||||
&BINIT, /* 0: Power-on reset PC */
|
||||
init_stack + init_stack_size, /* 1: Power-on reset SP */
|
||||
&BINIT, /* 2: Manual reset PC */
|
||||
init_stack + init_stack_size, /* 3: Manual reset SP */
|
||||
{
|
||||
&catch_exception_4, /* 4: General invalid instruction */
|
||||
&catch_exception_random, /* 5: Reserved for system */
|
||||
&catch_exception_6, /* 6: Invalid slot instruction */
|
||||
&catch_exception_random, /* 7: Reserved for system */
|
||||
&catch_exception_random, /* 8: Reserved for system */
|
||||
&catch_exception_9, /* 9: CPU bus error */
|
||||
&catch_exception_10, /* 10: DMA bus error */
|
||||
&catch_exception_11, /* 11: NMI */
|
||||
&catch_exception_random, /* 12: User break */
|
||||
&catch_exception_random, /* 13: Reserved for system */
|
||||
&catch_exception_random, /* 14: Reserved for system */
|
||||
&catch_exception_random, /* 15: Reserved for system */
|
||||
&catch_exception_random, /* 16: Reserved for system */
|
||||
&catch_exception_random, /* 17: Reserved for system */
|
||||
&catch_exception_random, /* 18: Reserved for system */
|
||||
&catch_exception_random, /* 19: Reserved for system */
|
||||
&catch_exception_random, /* 20: Reserved for system */
|
||||
&catch_exception_random, /* 21: Reserved for system */
|
||||
&catch_exception_random, /* 22: Reserved for system */
|
||||
&catch_exception_random, /* 23: Reserved for system */
|
||||
&catch_exception_random, /* 24: Reserved for system */
|
||||
&catch_exception_random, /* 25: Reserved for system */
|
||||
&catch_exception_random, /* 26: Reserved for system */
|
||||
&catch_exception_random, /* 27: Reserved for system */
|
||||
&catch_exception_random, /* 28: Reserved for system */
|
||||
&catch_exception_random, /* 29: Reserved for system */
|
||||
&catch_exception_random, /* 30: Reserved for system */
|
||||
&catch_exception_random, /* 31: Reserved for system */
|
||||
&catch_exception_32, /* 32: Trap instr (user vectors) */
|
||||
&catch_exception_33, /* 33: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 34: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 35: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 36: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 37: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 38: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 39: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 40: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 41: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 42: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 43: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 44: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 45: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 46: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 47: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 48: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 49: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 50: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 51: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 52: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 53: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 54: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 55: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 56: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 57: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 58: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 59: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 60: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 61: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 62: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 63: Trap instr (user vectors) */
|
||||
&catch_exception_random, /* 64: IRQ0 */
|
||||
&catch_exception_random, /* 65: IRQ1 */
|
||||
&catch_exception_random, /* 66: IRQ2 */
|
||||
&catch_exception_random, /* 67: IRQ3 */
|
||||
&catch_exception_random, /* 68: IRQ4 */
|
||||
&catch_exception_random, /* 69: IRQ5 */
|
||||
&catch_exception_random, /* 70: IRQ6 */
|
||||
&catch_exception_random, /* 71: IRQ7 */
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_random,
|
||||
&catch_exception_255}};
|
||||
|
||||
#define BCR (*(volatile short *)(0x05FFFFA0)) /* Bus control register */
|
||||
#define BAS (0x800) /* Byte access select */
|
||||
#define WCR1 (*(volatile short *)(0x05ffffA2)) /* Wait state control register */
|
||||
|
||||
asm ("_BINIT: mov.l L1,r15");
|
||||
asm ("bra _INIT");
|
||||
asm ("nop");
|
||||
@@ -1547,3 +1574,4 @@ handleError (char theSSR)
|
||||
SSR1 &= ~(SCI_ORER | SCI_PER | SCI_FER);
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user