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aarch64: Add support for 128-bit system register mrrs and msrr insns

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With the addition of 128-bit system registers to the Arm architecture
starting with Armv9.4-a, a mechanism for manipulating their contents
is introduced with the `msrr' and `mrrs' instruction pair.

These move values from one such 128-bit system register into a pair of
contiguous general-purpose registers and vice-versa, as for example:

	   msrr ttlb0_el1, x0, x1
	   mrrs x0, x1, ttlb0_el1

This patch adds the necessary support for these instructions, adding
checks for system-register width by defining a new operand type in the
form of `AARCH64_OPND_SYSREG128' and the `aarch64_sys_reg_128bit_p'
predicate, responsible for checking whether the requested system
register table entry is marked as implemented in the 128-bit mode via
the F_REG_128 flag.
This commit is contained in:
Victor Do Nascimento
2023-11-20 20:40:10 +00:00
parent 33ccb0e0db
commit 9af8f67118
10 changed files with 89 additions and 5 deletions
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2
include/opcode/aarch64.h
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@@ -561,6 +561,7 @@ enum aarch64_opnd
AARCH64_OPND_SIMD_ADDR_POST, /* Address of ld/st multiple post-indexed. */
AARCH64_OPND_SYSREG, /* System register operand. */
AARCH64_OPND_SYSREG128, /* 128-bit system register operand. */
AARCH64_OPND_PSTATEFIELD, /* PSTATE field name operand. */
AARCH64_OPND_SYSREG_AT, /* System register <at_op> operand. */
AARCH64_OPND_SYSREG_DC, /* System register <dc_op> operand. */
@@ -1328,6 +1329,7 @@ typedef struct
extern const aarch64_sys_reg aarch64_sys_regs [];
extern const aarch64_sys_reg aarch64_pstatefields [];
extern bool aarch64_sys_reg_deprecated_p (const uint32_t);
extern bool aarch64_sys_reg_128bit_p (const uint32_t);
extern bool aarch64_sys_reg_alias_p (const uint32_t);
extern bool aarch64_pstatefield_supported_p (const aarch64_feature_set,
const aarch64_sys_reg *);