forked from Imagelibrary/binutils-gdb
import gdb-1999-07-07 pre reformat
This commit is contained in:
@@ -1,3 +1,9 @@
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Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
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* mips.igen (MULT, MULTU): Add syntax for two operand version.
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(DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
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them as unimplemented.
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1999-05-08 Felix Lee <flee@cygnus.com>
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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339
sim/mips/configure
vendored
339
sim/mips/configure
vendored
File diff suppressed because it is too large
Load Diff
@@ -1720,6 +1720,7 @@
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000000,5.RS,5.RT,5.RD,00000011000:SPECIAL:32::MULT
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"mult r<RS>, r<RT>":RD == 0
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"mult r<RD>, r<RS>, r<RT>"
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*vr5000:
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*r3900:
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@@ -1751,6 +1752,7 @@
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}
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000000,5.RS,5.RT,5.RD,00000011001:SPECIAL:32::MULTU
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"multu r<RS>, r<RT>":RD == 0
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"multu r<RD>, r<RS>, r<RT>"
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*vr5000:
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*r3900:
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@@ -3795,6 +3797,22 @@
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*vr5000:
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010000,00001,5.RT,5.RD,000,0000,0000:COP0:64::DMFC0
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"dmfc0 r<RT>, r<RD>"
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*mipsIII,mipsIV:
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{
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DecodeCoproc (instruction_0);
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}
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010000,00101,5.RT,5.RD,000,0000,0000:COP0:64::DMTC0
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"dmtc0 r<RT>, r<RD>"
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*mipsIII,mipsIV:
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{
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DecodeCoproc (instruction_0);
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}
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010000,10000,000000000000000,111000:COP0:32::EI
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"ei"
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*mipsI,mipsII,mipsIII,mipsIV:
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@@ -38,4 +38,9 @@
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GPR[RD] = LO;
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}
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000000,CODE.20,001110::CO1:::SDBBP
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"sdbbp"
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*r4900:
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{
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SignalException (DebugBreakPoint, instruction);
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}
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