* config/tc-spu.c: Don't include opcode/spu.h.

(md_assemble): Set tc_fix_data.insn_tag and arg_format.
	(md_apply_fix): Adjust.
	* config/tc-spu.h: Include opcode/spu.h.
	(struct tc_fix_info): New.
	(TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
	(TC_FORCE_RELOCATION): Define.

gas/ChangeLog

@@ -1,3 +1,13 @@
+2007-03-23  Alan Modra  <amodra@bigpond.net.au>
+
+	* config/tc-spu.c: Don't include opcode/spu.h.
+	(md_assemble): Set tc_fix_data.insn_tag and arg_format.
+	(md_apply_fix): Adjust.
+	* config/tc-spu.h: Include opcode/spu.h.
+	(struct tc_fix_info): New.
+	(TC_FIX_TYPE, TC_INIT_FIX_DATA): Adjust.
+	(TC_FORCE_RELOCATION): Define.
+
 2007-03-22  Joseph Myers  <joseph@codesourcery.com>
 
 	* doc/as.texinfo: Include VERSION_PACKAGE when reporting version.

gas/config/tc-spu.c

@@ -1,6 +1,6 @@
 /* spu.c -- Assembler for the IBM Synergistic Processing Unit (SPU)
 
-   Copyright 2006 Free Software Foundation, Inc.
+   Copyright 2006, 2007 Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
 
@@ -22,7 +22,6 @@
 #include "as.h"
 #include "safe-ctype.h"
 #include "subsegs.h"
-#include "opcode/spu.h"
 #include "dwarf2dbg.h" 
 
 const struct spu_opcode spu_opcodes[] = {
@@ -366,7 +365,8 @@ md_assemble (char *op)
 			    &insn.exp[i],
 			    pcrel,
 			    reloc);
-	fixP->tc_fix_data = insn.reloc_arg[i];
+	fixP->tc_fix_data.arg_format = insn.reloc_arg[i];
+	fixP->tc_fix_data.insn_tag = insn.tag;
       }
   dwarf2_emit_insn (4);
 }
@@ -941,10 +941,10 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
     {
       fixP->fx_done = 1;
       res = 0;
-      if (fixP->tc_fix_data > A_P)
+      if (fixP->tc_fix_data.arg_format > A_P)
 	{
-	  int hi = arg_encode[fixP->tc_fix_data].hi;
+	  int hi = arg_encode[fixP->tc_fix_data.arg_format].hi;
-	  int lo = arg_encode[fixP->tc_fix_data].lo;
+	  int lo = arg_encode[fixP->tc_fix_data.arg_format].lo;
 	  if (hi > lo && ((offsetT) val < lo || (offsetT) val > hi))
 	    as_bad_where (fixP->fx_file, fixP->fx_line,
 			  "Relocation doesn't fit. (relocation value = 0x%lx)",

gas/config/tc-spu.h

@@ -21,6 +21,8 @@
 
 #define TC_SPU
 
+#include "opcode/spu.h"
+
 #ifdef OBJ_ELF
 #define TARGET_FORMAT "elf32-spu"
 #define TARGET_ARCH bfd_arch_spu
@@ -44,13 +46,35 @@
 #define TC_KEEP_FX_OFFSET
 /* #define TC_CONS_RELOC RELOC_32 */
 
-/* If defined, fixS will have a member named tc_fix_data of this type.  */
+struct tc_fix_info {
-#define TC_FIX_TYPE int
+  unsigned short arg_format;
-#define TC_INIT_FIX_DATA(FIXP) ((FIXP)->tc_fix_data = 0)
+  unsigned short insn_tag;
+};
+
+/* fixS will have a member named tc_fix_data of this type.  */
+#define TC_FIX_TYPE struct tc_fix_info
+#define TC_INIT_FIX_DATA(FIXP) \
+  do						\
+    {						\
+      (FIXP)->tc_fix_data.arg_format = 0;	\
+      (FIXP)->tc_fix_data.insn_tag = 0;		\
+    }						\
+  while (0)
 
 /* Don't reduce function symbols to section symbols.  */
 #define tc_fix_adjustable(FIXP) (!S_IS_FUNCTION ((FIXP)->fx_addsy))
 
+/* Keep relocs on calls.  Branches to function symbols are tail or
+   sibling calls.  */
+#define TC_FORCE_RELOCATION(FIXP) \
+  ((FIXP)->tc_fix_data.insn_tag == M_BRSL		\
+   || (FIXP)->tc_fix_data.insn_tag == M_BRASL		\
+   || (((FIXP)->tc_fix_data.insn_tag == M_BR		\
+	|| (FIXP)->tc_fix_data.insn_tag == M_BRA)	\
+       && (FIXP)->fx_addsy != NULL			\
+       && S_IS_FUNCTION ((FIXP)->fx_addsy))		\
+   || generic_force_reloc (FIXP))
+
 /* Values passed to md_apply_fix don't include symbol values.  */
 #define MD_APPLY_SYM_VALUE(FIX) 0