forked from Imagelibrary/binutils-gdb
Do not use old-style definitions in sim
This changes all the non-generated (hand-written) code in sim to use "new" (post-K&R) style function definitions. 2021-04-08 Tom Tromey <tom@tromey.com> * bpf.c (bpf_def_model_init): Use new-style declaration. sim/common/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * cgen-utils.c (RORQI, ROLQI, RORHI, ROLHI, RORSI, ROLSI): Use new-style declaration. sim/erc32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sis.c (run_sim, main): Use new-style declaration. * interf.c (run_sim, sim_open, sim_close, sim_load) (sim_create_inferior, sim_store_register, sim_fetch_register) (sim_info, sim_stop_reason, flush_windows, sim_do_command): Use new-style declaration. * help.c (usage, gen_help): Use new-style declaration. * func.c (batch, set_regi, set_rega, disp_reg, limcalc) (reset_stat, show_stat, init_bpt, int_handler, init_signals) (disp_fpu, disp_regs, disp_ctrl, disp_mem, dis_mem, event) (init_event, set_int, advance_time, now, wait_for_irq, check_bpt) (reset_all, sys_reset, sys_halt): Use new-style declaration. * float.c (get_accex, clear_accex, set_fsr): Use new-style declaration. * exec.c (sub_cc, add_cc, log_cc, dispatch_instruction, fpexec) (chk_asi, execute_trap, check_interrupts, init_regs): Use new-style declaration. * erc32.c (init_sim, reset, decode_ersr, mecparerror) (error_mode, decode_memcfg, decode_wcr, decode_mcr, sim_halt) (close_port, exit_sim, mec_reset, mec_intack, chk_irq, mec_irq) (set_sfsr, mec_read, mec_write, init_stdio, restore_stdio) (port_init, read_uart, write_uart, flush_uart, uarta_tx) (uartb_tx, uart_rx, uart_intr, uart_irq_start, wdog_intr) (wdog_start, rtc_intr, rtc_start, rtc_counter_read) (rtc_scaler_set, rtc_reload_set, gpt_intr, gpt_start) (gpt_counter_read, gpt_scaler_set, gpt_reload_set, timer_ctrl) (memory_read, memory_write, get_mem_ptr, sis_memory_write) (sis_memory_read): Use new-style declaration. sim/frv/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, frv_sim_close, sim_create_inferior): Use new-style declaration. sim/h8300/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * compile.c (cmdline_location): Use new-style declaration. sim/iq2000/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. * iq2000.c (fetch_str): Use new-style declaration. sim/lm32/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration. sim/m32r/ChangeLog 2021-04-08 Tom Tromey <tom@tromey.com> * sim-if.c (sim_open, sim_create_inferior): Use new-style declaration.
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@@ -234,11 +234,7 @@ extern uint32 errtt, errftt;
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#endif
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static uint32
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sub_cc(psr, operand1, operand2, result)
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uint32 psr;
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int32 operand1;
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int32 operand2;
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int32 result;
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sub_cc(uint32 psr, int32 operand1, int32 operand2, int32 result)
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{
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psr = ((psr & ~PSR_N) | ((result >> 8) & PSR_N));
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if (result)
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@@ -253,11 +249,7 @@ sub_cc(psr, operand1, operand2, result)
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}
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uint32
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add_cc(psr, operand1, operand2, result)
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uint32 psr;
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int32 operand1;
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int32 operand2;
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int32 result;
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add_cc(uint32 psr, int32 operand1, int32 operand2, int32 result)
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{
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psr = ((psr & ~PSR_N) | ((result >> 8) & PSR_N));
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if (result)
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@@ -272,9 +264,7 @@ add_cc(psr, operand1, operand2, result)
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}
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static void
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log_cc(result, sregs)
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int32 result;
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struct pstate *sregs;
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log_cc(int32 result, struct pstate *sregs)
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{
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sregs->psr &= ~(PSR_CC); /* Zero CC bits */
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sregs->psr = (sregs->psr | ((result >> 8) & PSR_N));
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@@ -398,8 +388,7 @@ extract_byte_signed (uint32 data, uint32 address)
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}
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int
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dispatch_instruction(sregs)
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struct pstate *sregs;
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dispatch_instruction(struct pstate *sregs)
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{
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uint32 cwp, op, op2, op3, asi, rd, cond, rs1,
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@@ -1671,9 +1660,7 @@ dispatch_instruction(sregs)
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static int
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fpexec(op3, rd, rs1, rs2, sregs)
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uint32 op3, rd, rs1, rs2;
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struct pstate *sregs;
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fpexec(uint32 op3, uint32 rd, uint32 rs1, uint32 rs2, struct pstate *sregs)
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{
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uint32 opf, tem, accex;
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int32 fcc;
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@@ -1952,10 +1939,7 @@ fpexec(op3, rd, rs1, rs2, sregs)
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}
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static int
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chk_asi(sregs, asi, op3)
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struct pstate *sregs;
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uint32 *asi, op3;
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chk_asi(struct pstate *sregs, uint32 *asi, uint32 op3)
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{
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if (!(sregs->psr & PSR_S)) {
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sregs->trap = TRAP_PRIVI;
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@@ -1969,8 +1953,7 @@ chk_asi(sregs, asi, op3)
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}
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int
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execute_trap(sregs)
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struct pstate *sregs;
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execute_trap(struct pstate *sregs)
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{
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int32 cwp;
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@@ -2017,8 +2000,7 @@ execute_trap(sregs)
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extern struct irqcell irqarr[16];
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int
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check_interrupts(sregs)
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struct pstate *sregs;
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check_interrupts(struct pstate *sregs)
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{
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#ifdef ERRINJ
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if (errtt) {
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@@ -2040,8 +2022,7 @@ check_interrupts(sregs)
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}
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void
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init_regs(sregs)
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struct pstate *sregs;
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init_regs(struct pstate *sregs)
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{
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sregs->pc = 0;
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sregs->npc = 4;
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