Toolchain/binutils-gdb
1
0
Fork 0
forked from Imagelibrary/binutils-gdb
Code Pull Requests Activity

sim: unify reserved instruction bits settings

Browse Source 
Move these options up to the common dir so we only test & export
them once across all ports.

The setting only affects igen based ports, and they were turning
this on by default, so keep the default in place.
This commit is contained in:
Mike Frysinger
2021-07-01 01:04:48 -04:00
parent 313c332ff2
commit 7eb1f99ada
33 changed files with 100 additions and 140 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
sim/riscv/ChangeLog
View File

@@ -1,3 +1,7 @@
2021-07-01 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate.
2021-06-30 Mike Frysinger <vapier@gentoo.org>
* configure: Regenerate.

2
sim/riscv/configure vendored
View File

@@ -586,7 +586,6 @@ ac_subst_vars='LTLIBOBJS
LIBOBJS
SIM_COMMON_BUILD_FALSE
SIM_COMMON_BUILD_TRUE
sim_reserved_bits
sim_float
cgen_breaks
target_alias
@@ -1760,7 +1759,6 @@ ac_config_commands="$ac_config_commands stamp-h"
SIM_COMMON_BUILD_TRUE='#'
SIM_COMMON_BUILD_FALSE=