forked from Imagelibrary/binutils-gdb
aarch64: [SME] Add MOV and MOVA instructions
This patch is adding new MOV (alias) and MOVA SME instruction. gas/ChangeLog: * config/tc-aarch64.c (enum sme_hv_slice): new enum. (struct reloc_entry): Added ZAH and ZAV registers. (parse_sme_immediate): Immediate parser. (parse_sme_za_hv_tiles_operand): ZA tile parser. (parse_sme_za_hv_tiles_operand_index): Index parser. (parse_operands): Added ZA tile parser calls. (REGNUMS): New macro. Regs with suffix. (REGSET16S): New macro. 16 regs with suffix. * testsuite/gas/aarch64/sme-2-illegal.d: New test. * testsuite/gas/aarch64/sme-2-illegal.l: New test. * testsuite/gas/aarch64/sme-2-illegal.s: New test. * testsuite/gas/aarch64/sme-2.d: New test. * testsuite/gas/aarch64/sme-2.s: New test. * testsuite/gas/aarch64/sme-2a.d: New test. * testsuite/gas/aarch64/sme-2a.s: New test. * testsuite/gas/aarch64/sme-3-illegal.d: New test. * testsuite/gas/aarch64/sme-3-illegal.l: New test. * testsuite/gas/aarch64/sme-3-illegal.s: New test. * testsuite/gas/aarch64/sme-3.d: New test. * testsuite/gas/aarch64/sme-3.s: New test. * testsuite/gas/aarch64/sme-3a.d: New test. * testsuite/gas/aarch64/sme-3a.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New enums AARCH64_OPND_SME_ZA_HV_idx_src and AARCH64_OPND_SME_ZA_HV_idx_dest. (struct aarch64_opnd_info): New ZA tile vector struct. opcodes/ChangeLog: * aarch64-asm.c (aarch64_ins_sme_za_hv_tiles): New inserter. * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter ins_sme_za_hv_tiles. * aarch64-dis.c (aarch64_ext_sme_za_hv_tiles): New extractor. * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor ext_sme_za_hv_tiles. * aarch64-opc.c (aarch64_print_operand): Handle SME_ZA_HV_idx_src and SME_ZA_HV_idx_dest. * aarch64-opc.h (enum aarch64_field_kind): New enums FLD_SME_size_10, FLD_SME_Q, FLD_SME_V and FLD_SME_Rv. (struct aarch64_operand): Increase fields size to 5. * aarch64-tbl.h (OP_SME_BHSDQ_PM_BHSDQ): New qualifiers aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
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@@ -447,6 +447,8 @@ enum aarch64_opnd
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AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
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AARCH64_OPND_SME_ZAda_2b, /* SME <ZAda>.S, 2-bits. */
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AARCH64_OPND_SME_ZAda_3b, /* SME <ZAda>.D, 3-bits. */
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AARCH64_OPND_SME_ZA_HV_idx_src, /* SME source ZA tile vector. */
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AARCH64_OPND_SME_ZA_HV_idx_dest, /* SME destination ZA tile vector. */
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AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
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AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
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AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
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@@ -1114,6 +1116,18 @@ struct aarch64_opnd_info
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uint32_t flags;
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} sysreg;
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/* ZA tile vector, e.g. <ZAn><HV>.D[<Wv>{, <imm>}] */
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struct
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{
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int regno; /* <ZAn> */
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struct
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{
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int regno; /* <Wv> */
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int imm; /* <imm> */
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} index;
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unsigned v : 1; /* <HV> horizontal or vertical vector indicator. */
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} za_tile_vector;
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const aarch64_cond *cond;
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/* The encoding of the PSTATE field. */
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aarch64_insn pstatefield;
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