x86: Rename VexOpcode to OpcodePrefix

Rename VexOpcode to OpcodePrefix so that OpcodePrefix can be used for
regular encoding prefix.

gas/

	* config/tc-i386.c (build_vex_prefix): Replace vexopcode with
	opcodeprefix.
	(build_evex_prefix): Likewise.
	(is_any_vex_encoding): Don't check vexopcode.
	(output_insn): Handle opcodeprefix.

opcodes/

	* i386-gen.c (opcode_modifiers): Replace VexOpcode with
	OpcodePrefix.
	* i386-opc.h (VexOpcode): Renamed to ...
	(OpcodePrefix): This.
	(PREFIX_NONE): New.
	(PREFIX_0X66): Likewise.
	(PREFIX_0XF2): Likewise.
	(PREFIX_0XF3): Likewise.
	* i386-opc.tbl (Prefix_0X66): New.
	(Prefix_0XF2): Likewise.
	(Prefix_0XF3): Likewise.
	Replace VexOpcode= with OpcodePrefix=.  Use Prefix_0X66 on xorpd.
	Use Prefix_0XF3 on cvtdq2pd.  Use Prefix_0XF2 on cvtpd2dq.
	* i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
2020-10-13 19:28:58 -07:00
parent 6248f5e4fc
commit 7b47a31256
7 changed files with 2156 additions and 2102 deletions

View File

@@ -1,3 +1,20 @@
2020-10-13 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Replace VexOpcode with
OpcodePrefix.
* i386-opc.h (VexOpcode): Renamed to ...
(OpcodePrefix): This.
(PREFIX_NONE): New.
(PREFIX_0X66): Likewise.
(PREFIX_0XF2): Likewise.
(PREFIX_0XF3): Likewise.
* i386-opc.tbl (Prefix_0X66): New.
(Prefix_0XF2): Likewise.
(Prefix_0XF3): Likewise.
Replace VexOpcode= with OpcodePrefix=. Use Prefix_0X66 on xorpd.
Use Prefix_0XF3 on cvtdq2pd. Use Prefix_0XF2 on cvtpd2dq.
* i386-tbl.h: Regenerated.
2020-10-05 Samanta Navarro <ferivoz@riseup.net>
* cgen-asm.c: Fix spelling mistakes.

View File

@@ -695,7 +695,7 @@ static bitfield opcode_modifiers[] =
BITFIELD (Vex),
BITFIELD (VexVVVV),
BITFIELD (VexW),
BITFIELD (VexOpcode),
BITFIELD (OpcodePrefix),
BITFIELD (VexSources),
BITFIELD (SIB),
BITFIELD (SSE2AVX),

View File

@@ -561,6 +561,16 @@ enum
#define VEXW1 2
#define VEXWIG 3
VexW,
/* Regular opcode prefix:
0: None
1: Add 0x66 opcode prefix.
2: Add 0xf2 opcode prefix.
3: Add 0xf3 opcode prefix.
*/
#define PREFIX_NONE 0
#define PREFIX_0X66 1
#define PREFIX_0XF2 2
#define PREFIX_0XF3 3
/* VEX opcode prefix:
0: VEX 0x0F opcode prefix.
1: VEX 0x0F38 opcode prefix.
@@ -575,7 +585,7 @@ enum
#define XOP08 3
#define XOP09 4
#define XOP0A 5
VexOpcode,
OpcodePrefix,
/* number of VEX source operands:
0: <= 2 source operands.
1: 2 XOP source operands.
@@ -720,7 +730,7 @@ typedef struct i386_opcode_modifier
unsigned int vex:2;
unsigned int vexvvvv:2;
unsigned int vexw:2;
unsigned int vexopcode:3;
unsigned int opcodeprefix:3;
unsigned int vexsources:2;
unsigned int sib:3;
unsigned int sse2avx:1;

File diff suppressed because it is too large Load Diff

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@@ -15526,7 +15526,7 @@ const insn_template i386_optab[] =
0, 1, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },
{ "xorpd", 0x660f57, None, 2, 2,
{ "xorpd", 0xf57, None, 2, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -15534,7 +15534,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 1, 0 } },
@@ -15554,7 +15554,7 @@ const insn_template i386_optab[] =
0, 1, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },
{ "cvtdq2pd", 0xf30fe6, None, 2, 2,
{ "cvtdq2pd", 0xfe6, None, 2, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -15562,7 +15562,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 3, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 1,
0, 1, 0, 0, 0, 1, 0 } },
@@ -15582,7 +15582,7 @@ const insn_template i386_optab[] =
0, 1, 0, 0, 0, 1, 0 } },
{ { 7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 0, 0 } } } },
{ "cvtpd2dq", 0xf20fe6, None, 2, 2,
{ "cvtpd2dq", 0xfe6, None, 2, 2,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -15590,7 +15590,7 @@ const insn_template i386_optab[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 7, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0,
0, 1, 0, 0, 0, 1, 0 } },