[MIPS/GAS] Split Loongson CAM Instructions from loongson3a

bfd/
	* elfxx-mips.c (print_mips_ases): Add CAM extension.

binutils/
	* readelf.c (print_mips_ases): Add CAM extension.

gas/
	* NEWS: Mention Loongson Content Address Memory (CAM)
	support.
	* config/tc-mips.c (options): Add OPTION_LOONGSON_CAM and
	OPTION_NO_LOONGSON_CAM.
	(md_longopts): Likewise.
	(mips_ases): Define availability for CAM.
	(mips_convert_ase_flags): Map ASE_LOONGSON_CAM to
	AFL_ASE_LOONGSON_CAM.
	(mips_cpu_info_table): Add ASE_LOONGSON_CAM for loongson3a.
	(md_show_usage): Add help for -mloongson-cam and
	-mno-loongson-cam.
	* doc/as.texi: Document -mloongson-cam, -mno-loongson-cam.
	* doc/c-mips.texi: Document -mloongson-cam, -mno-loongson-cam,
	.set loongson-cam and .set noloongson-cam.
	* testsuite/gas/mips/loongson-3a-2.d: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.d: Here.  Add ISA/ASE
	flag verification.
	* testsuite/gas/mips/loongson-3a-2.s: Move cam test to ...
	* testsuite/gas/mips/loongson-cam.s: Here.
	* testsuite/gas/mips/loongson-3a-mmi.d: Add ASE flag.
	* testsuite/gas/mips/mips.exp: Run loongson-cam test.

include/
	* elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
	(AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
	* opcode/mips.h (ASE_LOONGSON_CAM): New macro.

opcodes/
	* mips-dis.c (mips_arch_choices): Add CAM to loongson3a
	descriptors.
	(parse_mips_ase_option): Handle -M loongson-cam option.
	(print_mips_disassembler_options): Document -M loongson-cam.
	* mips-opc.c (LCAM): New macro.
	(mips_opcodes): Replace IL2F|IL3A marking with LCAM for CAM
	instructions.
This commit is contained in:
Chenghua Xu
2018-08-29 17:39:33 +08:00
parent 36eb4c5f9b
commit 716c08de28
21 changed files with 154 additions and 18 deletions

View File

@@ -1531,6 +1531,8 @@ enum options
OPTION_NO_GINV,
OPTION_LOONGSON_MMI,
OPTION_NO_LOONGSON_MMI,
OPTION_LOONGSON_CAM,
OPTION_NO_LOONGSON_CAM,
OPTION_END_OF_ENUM
};
@@ -1593,6 +1595,8 @@ struct option md_longopts[] =
{"mno-ginv", no_argument, NULL, OPTION_NO_GINV},
{"mloongson-mmi", no_argument, NULL, OPTION_LOONGSON_MMI},
{"mno-loongson-mmi", no_argument, NULL, OPTION_NO_LOONGSON_MMI},
{"mloongson-cam", no_argument, NULL, OPTION_LOONGSON_CAM},
{"mno-loongson-cam", no_argument, NULL, OPTION_NO_LOONGSON_CAM},
/* Old-style architecture options. Don't add more of these. */
{"m4650", no_argument, NULL, OPTION_M4650},
@@ -1795,6 +1799,11 @@ static const struct mips_ase mips_ases[] = {
OPTION_LOONGSON_MMI, OPTION_NO_LOONGSON_MMI,
0, 0, -1, -1,
-1 },
{ "loongson-cam", ASE_LOONGSON_CAM, 0,
OPTION_LOONGSON_CAM, OPTION_NO_LOONGSON_CAM,
0, 0, -1, -1,
-1 },
};
/* The set of ASEs that require -mfp64. */
@@ -19028,6 +19037,8 @@ mips_convert_ase_flags (int ase)
ext_ases |= AFL_ASE_GINV;
if (ase & ASE_LOONGSON_MMI)
ext_ases |= AFL_ASE_LOONGSON_MMI;
if (ase & ASE_LOONGSON_CAM)
ext_ases |= AFL_ASE_LOONGSON_CAM;
return ext_ases;
}
@@ -19773,9 +19784,10 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
/* Broadcom SB-1A CPU core */
{ "sb1a", 0, ASE_MIPS3D | ASE_MDMX, ISA_MIPS64, CPU_SB1 },
{ "loongson3a", 0, ASE_LOONGSON_MMI, ISA_MIPS64R2, CPU_LOONGSON_3A },
/* MIPS 64 Release 2 */
/* Loongson CPU core */
{ "loongson3a", 0, ASE_LOONGSON_MMI | ASE_LOONGSON_CAM, ISA_MIPS64R2,
CPU_LOONGSON_3A },
/* Cavium Networks Octeon CPU core */
{ "octeon", 0, 0, ISA_MIPS64R2, CPU_OCTEON },
@@ -20051,6 +20063,9 @@ MIPS options:\n\
-mloongson-mmi generate Loongson MultiMedia extensions Instructions (MMI) instructions\n\
-mno-loongson-mmi do not generate Loongson MultiMedia extensions Instructions\n"));
fprintf (stream, _("\
-mloongson-cam generate Loongson Content Address Memory (CAM) instructions\n\
-mno-loongson-cam do not generate Loongson Content Address Memory Instructions\n"));
fprintf (stream, _("\
-minsn32 only generate 32-bit microMIPS instructions\n\
-mno-insn32 generate all microMIPS instructions\n"));
fprintf (stream, _("\