forked from Imagelibrary/binutils-gdb
sim: lm32: invert sim_cpu storage
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
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@@ -54,7 +54,7 @@ typedef struct {
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#define GET_H_CSR(a1) CPU (h_csr)[a1]
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#define SET_H_CSR(a1, x) (CPU (h_csr)[a1] = (x))
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} hardware;
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#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
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#define CPU_CGEN_HW(cpu) (& LM32_SIM_CPU (cpu)->cpu_data.hardware)
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} LM32BF_CPU_DATA;
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/* Cover fns for register access. */
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@@ -101,7 +101,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
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current_target_byte_order = BFD_ENDIAN_BIG;
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
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if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct lm32_sim_cpu))
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!= SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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@@ -23,6 +23,8 @@
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#ifndef SIM_MAIN_H
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#define SIM_MAIN_H
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#define SIM_HAVE_COMMON_SIM_CPU
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#define WITH_SCACHE_PBB 1
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#include "symcat.h"
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@@ -36,16 +38,8 @@
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#include "lm32-sim.h"
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#include "opcode/cgen.h"
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/* The _sim_cpu struct. */
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struct _sim_cpu
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struct lm32_sim_cpu
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{
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/* sim/common cpu base. */
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sim_cpu_base base;
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/* Static parts of cgen. */
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CGEN_CPU cgen_cpu;
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/* CPU specific parts go here.
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Note that in files that don't need to access these pieces WANT_CPU_FOO
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won't be defined and thus these parts won't appear. This is ok in the
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@@ -56,8 +50,8 @@ struct _sim_cpu
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#if defined (WANT_CPU_LM32BF)
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LM32BF_CPU_DATA cpu_data;
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#endif
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};
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#define LM32_SIM_CPU(cpu) ((struct lm32_sim_cpu *) CPU_ARCH_DATA (cpu))
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/* Misc. */
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