gdb/arm: Handle lazy FPU state preservation

Read LSPEN, ASPEN and LSPACT bits from FPCCR and use them together
with FPCAR to identify if lazy FPU state preservation is active for
the current frame.  See "Lazy context save of FP state", in B1.5.7,
also ARM AN298, supported by Cortex-M4F architecture for details on
lazy FPU register stacking.  The same conditions are valid for other
Cortex-M cores with FPU.

This patch has been verified on a STM32F4-Discovery board by:
a) writing a non-zero value (lets use 0x1122334455667788 as an
   example) to all the D-registers in the main function
b) configured the SysTick to fire
c) in the SysTick_Handler, write some other value (lets use
   0x0022446688aaccee as an example) to one of the D-registers (D0 as
   an example) and then do "SVC #0"
d) in the SVC_Handler, write some other value (lets use
   0x0099aabbccddeeff) to one of the D-registers (D0 as an example)

In GDB, suspend the execution in the SVC_Handler function and compare
the value of the D-registers for the SVC_handler frame and the
SysTick_Handler frame.  With the patch, the value of the modified
D-register (D0) should be the new value (0x009..eff) on the
SVC_Handler frame, and the intermediate value (0x002..cee) for the
SysTick_Handler frame.  Now compare the D-register value for the
SysTick_Handler frame and the main frame.  The main frame should
have the initial value (0x112..788).

Signed-off-by: Torbjörn SVENSSON  <torbjorn.svensson@foss.st.com>
Signed-off-by: Yvan ROUX  <yvan.roux@foss.st.com>
This commit is contained in:
Torbjörn SVENSSON
2022-10-06 16:01:10 +02:00
committed by Yvan Roux
parent ca10a126c6
commit 60c90d8c6d
2 changed files with 46 additions and 17 deletions

View File

@@ -115,7 +115,12 @@ enum system_register_address : CORE_ADDR
/* M-profile Floating-Point Context Control Register address, defined in
ARMv7-M (Section B3.2.2) and ARMv8-M (Section D1.2.99) reference
manuals. */
FPCCR = 0xe000ef34
FPCCR = 0xe000ef34,
/* M-profile Floating-Point Context Address Register address, defined in
ARMv7-M (Section B3.2.2) and ARMv8-M (Section D1.2.98) reference
manuals. */
FPCAR = 0xe000ef38
};
/* Instruction condition field values. */