forked from Imagelibrary/binutils-gdb
regenerate
This commit is contained in:
@@ -1,8 +1,6 @@
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/* CGEN opcode support for m32r.
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This file is machine generated.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and/or GDB, the GNU debugger.
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@@ -33,12 +31,14 @@ with this program; if not, write to the Free Software Foundation, Inc.,
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/* Attributes. */
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static const CGEN_ATTR_ENTRY MACH_attr[] =
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{ { "m32r", MACH_M32R },
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{
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{ "m32r", MACH_M32R },
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{ 0, 0 }
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};
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const CGEN_ATTR_TABLE m32r_cgen_operand_attr_table[] =
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{ { "ABS-ADDR", NULL },
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{
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{ "ABS-ADDR", NULL },
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{ "FAKE", NULL },
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{ "NEGATIVE", NULL },
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{ "PC", NULL },
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@@ -51,7 +51,8 @@ const CGEN_ATTR_TABLE m32r_cgen_operand_attr_table[] =
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};
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const CGEN_ATTR_TABLE m32r_cgen_insn_attr_table[] =
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{ { "ALIAS", NULL },
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{
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{ "ALIAS", NULL },
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{ "COND-CTI", NULL },
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{ "FILL-SLOT", NULL },
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{ "RELAX", NULL },
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@@ -65,16 +66,19 @@ const CGEN_ATTR_TABLE m32r_cgen_insn_attr_table[] =
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};
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CGEN_KEYWORD_ENTRY m32r_cgen_opval_mach_entries[] =
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{ { "m32r", MACH_M32R }
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{
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{ "m32r", MACH_M32R }
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};
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CGEN_KEYWORD m32r_cgen_opval_mach =
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{ & m32r_cgen_opval_mach_entries[0],
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{
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& m32r_cgen_opval_mach_entries[0],
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1
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};
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CGEN_KEYWORD_ENTRY m32r_cgen_opval_h_gr_entries[] =
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{ { "fp", 13 },
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{
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{ "fp", 13 },
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{ "lr", 14 },
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{ "sp", 15 },
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{ "r0", 0 },
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@@ -96,12 +100,14 @@ CGEN_KEYWORD_ENTRY m32r_cgen_opval_h_gr_entries[] =
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};
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CGEN_KEYWORD m32r_cgen_opval_h_gr =
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{ & m32r_cgen_opval_h_gr_entries[0],
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{
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& m32r_cgen_opval_h_gr_entries[0],
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19
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};
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CGEN_KEYWORD_ENTRY m32r_cgen_opval_h_cr_entries[] =
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{ { "psw", 0 },
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{
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{ "psw", 0 },
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{ "cbr", 1 },
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{ "spi", 2 },
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{ "spu", 3 },
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@@ -116,13 +122,15 @@ CGEN_KEYWORD_ENTRY m32r_cgen_opval_h_cr_entries[] =
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};
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CGEN_KEYWORD m32r_cgen_opval_h_cr =
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{ & m32r_cgen_opval_h_cr_entries[0],
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{
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& m32r_cgen_opval_h_cr_entries[0],
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12
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};
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static CGEN_HW_ENTRY m32r_cgen_hw_entries[] =
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{ { & m32r_cgen_hw_entries[1], "h-pc", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
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{
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{ & m32r_cgen_hw_entries[1], "h-pc", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
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{ & m32r_cgen_hw_entries[2], "h-memory", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
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{ & m32r_cgen_hw_entries[3], "h-sint", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
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{ & m32r_cgen_hw_entries[4], "h-uint", CGEN_ASM_KEYWORD /*FIXME*/, 0 },
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@@ -193,7 +201,8 @@ const CGEN_OPERAND m32r_cgen_operand_table[CGEN_NUM_OPERANDS] =
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#define OP 1 /* syntax value for mnemonic */
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static const CGEN_SYNTAX syntax_table[] =
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{/* <op> $dr,$sr */
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{
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/* <op> $dr,$sr */
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/* 0 */ { OP, ' ', 130, ',', 129, 0 },
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/* <op> $dr,$sr,$slo16 */
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/* 1 */ { OP, ' ', 130, ',', 129, ',', 141, 0 },
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@@ -268,7 +277,8 @@ static const CGEN_SYNTAX syntax_table[] =
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#undef OP
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static const CGEN_FORMAT format_table[] =
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{/* f-op1.number.f-r1.dr.f-op2.number.f-r2.sr. */
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{
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/* f-op1.number.f-r1.dr.f-op2.number.f-r2.sr. */
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/* 0 */ { 16, 16, 0xf0f0 },
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/* f-op1.number.f-r1.dr.f-op2.number.f-r2.sr.f-simm16.slo16. */
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/* 1 */ { 32, 32, 0xf0f00000 },
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@@ -327,7 +337,8 @@ static const CGEN_FORMAT format_table[] =
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#define FMT(n) (& format_table[n])
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const CGEN_INSN m32r_cgen_insn_table_entries[CGEN_NUM_INSNS] =
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{ /* null first entry, end of all hash chains */
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{
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/* null first entry, end of all hash chains */
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{ { 0 }, 0 },
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/* add $dr,$sr */
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{
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@@ -1119,14 +1130,15 @@ m32r_cgen_asm_hash_insn (insn)
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unsigned int
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m32r_cgen_dis_hash_insn (buf, value)
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const char * buf;
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const char * buf;
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unsigned long value;
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{
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return CGEN_DIS_HASH (buf, value);
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}
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CGEN_OPCODE_DATA m32r_cgen_opcode_data =
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{ & m32r_cgen_hw_entries[0],
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{
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& m32r_cgen_hw_entries[0],
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& m32r_cgen_insn_table,
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};
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@@ -1141,7 +1153,7 @@ m32r_cgen_init_tables (mach)
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CGEN_INLINE void
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m32r_cgen_set_operand (opindex, valuep, fields)
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int opindex;
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const long * valuep;
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const long * valuep;
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CGEN_FIELDS * fields;
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{
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switch (opindex)
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@@ -1212,7 +1224,7 @@ m32r_cgen_set_operand (opindex, valuep, fields)
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CGEN_INLINE long
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m32r_cgen_get_operand (opindex, fields)
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int opindex;
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int opindex;
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const CGEN_FIELDS * fields;
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{
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long value;
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