binutils/gas/riscv: Add DWARF register numbers for CSRs

This commit gives DWARF register numbers to the RISC-V CSRs inline
with the RISC-V ELF specification here:

  https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md

The CSRs are defined being numbered from 4096 to 8191.

This adds support to the assembler, required in order to reference
CSRs in, for example .cfi directives.

I have then extended dwarf.c in order to support printing CSR names in
the dumped DWARF output.  As the CSR name space is quite large and
only sparsely populated, I have provided a new function to perform
RISC-V DWARF register name lookup which uses a switch statement rather
than the table base approach that other architectures use.

Any CSR that does not have a known name will return a name based on
'csr%d' with the %d being replaced by the offset of the CSR from 4096.

gas/ChangeLog:

	* config/tc-riscv.c (tc_riscv_regname_to_dw2regnum): Lookup CSR
	names too.
	* testsuite/gas/riscv/csr-dw-regnums.d: New file.
	* testsuite/gas/riscv/csr-dw-regnums.s: New file.

binutils/ChangeLog:

	* dwarf.c (regname_internal_riscv): New function.
	(init_dwarf_regnames_riscv): Use new function.

Change-Id: I3f70bc24fa8b3c75744e6775eeeb87db70c7ecfb
This commit is contained in:
Andrew Burgess
2019-11-18 16:00:59 +00:00
parent 1296bc99b1
commit 4762fe621e
6 changed files with 574 additions and 3 deletions

View File

@@ -3037,6 +3037,10 @@ tc_riscv_regname_to_dw2regnum (char *regname)
if ((reg = reg_lookup_internal (regname, RCLASS_FPR)) >= 0)
return reg + 32;
/* CSRs are numbered 4096 -> 8191. */
if ((reg = reg_lookup_internal (regname, RCLASS_CSR)) >= 0)
return reg + 4096;
as_bad (_("unknown register `%s'"), regname);
return -1;
}