bpf: correct neg and neg32 instruction encoding

The neg/neg32 BPF instructions always use BPF_SRC_K (=0) in their header
source bit, despite operating on registers.  If BPF_SRC_X (=1) is set,
the instructions are rejected by the kernel.

Because of this there are also no neg/neg32 instructions which operate
on immediates, so remove them.

bd434cc4d9 was a similar fix in the old
CGEN-based port, but was not carried forward in the new port.

include/
	* opcode/bpf.h (enum bpf_insn_id): Remove spurious entries
	BPF_INSN_NEGI and BPF_INSN_NEG32I.

opcodes/
	* bpf-opc.c (bpf_opcodes): Remove erroneous NEGI and NEG32I
	instructions.

gas/
	* doc/c-bpf.texi (BPF Instructions): Remove erroneous neg and
	neg32 instructions operating on immediates.
	* testsuite/gas/bpf/alu.s: Adapt accordingly.
	* testsuite/gas/bpf/alu.d: Likewise.
	* testsuite/gas/bpf/alu-be.d: Likewise
	* testsuite/gas/bpf/alu32.s: Likewise.
	* testsuite/gas/bpf/alu32.d: Likewise.
	* testsuite/gas/bpf/alu32-be.d: Likewise.
	* testsuite/gas/bpf/alu-pseudoc.s: Likewise.
	* testsuite/gas/bpf/alu-pseudoc.d: Likewise.
	* testsuite/gas/bpf/alu-be-pseudoc.d: Likewise.
	* testsuite/gas/bpf/alu32-pseudoc.s: Likewise.
	* testsuite/gas/bpf/alu32-pseudoc.d: Likewise.
	* testsuite/gas/bpf/alu32-be-pseudoc.d: Likewise.
This commit is contained in:
David Faust
2023-08-21 09:07:11 -07:00
parent 11e3488d3f
commit 41aa80c544
15 changed files with 10 additions and 48 deletions

View File

@@ -74,8 +74,6 @@ const struct bpf_opcode bpf_opcodes[] =
{BPF_INSN_XORI, "xor%W%dr , %i32", "%dr ^= %i32",
BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_XOR|BPF_SRC_K},
{BPF_INSN_NEGR, "neg%W%dr", "%dr = - %dr",
BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_X},
{BPF_INSN_NEGI, "neg%W%dr , %i32", "%dr = -%W%i32",
BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_NEG|BPF_SRC_K},
{BPF_INSN_LSHR, "lsh%W%dr , %sr", "%dr <<= %sr",
BPF_V1, BPF_CODE, BPF_CLASS_ALU64|BPF_CODE_LSH|BPF_SRC_X},
@@ -142,8 +140,6 @@ const struct bpf_opcode bpf_opcodes[] =
{BPF_INSN_XOR32I, "xor32%W%dr , %i32", "%dw ^= %i32",
BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_XOR|BPF_SRC_K},
{BPF_INSN_NEG32R, "neg32%W%dr", "%dw = - %dw",
BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_X},
{BPF_INSN_NEG32I, "neg32%W%dr , %i32", "%dw = -%W%i32",
BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_NEG|BPF_SRC_K},
{BPF_INSN_LSH32R, "lsh32%W%dr , %sr", "%dw <<= %sw",
BPF_V1, BPF_CODE, BPF_CLASS_ALU|BPF_CODE_LSH|BPF_SRC_X},