PowerPC: Add support for Power11 options

binutils/
	* doc/binutils.texi (PowerPC -M option): Mention power11 and pwr11.

gas/
	* config/tc-ppc.c: (md_show_usage): Mention -mpower11 and -mpwr11.
	* doc/c-ppc.texi: Likewise.

opcodes/
	* ppc-dis.c (ppc_opts): Add "power11" and "pwr11" entries.
	(powerpc_init_dialect): Default to "power11".
This commit is contained in:
Peter Bergner
2024-02-09 10:51:30 -06:00
parent 590a4cb21e
commit 4199cf1e15
4 changed files with 22 additions and 6 deletions

View File

@@ -2662,11 +2662,12 @@ rather than @code{li}. All of the @option{-m} arguments for
@option{e300}, @option{e500}, @option{e500mc}, @option{e500mc64},
@option{e500x2}, @option{e5500}, @option{e6500}, @option{efs},
@option{power4}, @option{power5}, @option{power6}, @option{power7},
@option{power8}, @option{power9}, @option{power10}, @option{ppc},
@option{ppc32}, @option{ppc64}, @option{ppc64bridge}, @option{ppcps},
@option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5}, @option{pwr5x},
@option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9}, @option{pwr10},
@option{pwrx}, @option{titan}, @option{vle}, and @option{future}.
@option{power8}, @option{power9}, @option{power10}, @option{power11},
@option{ppc}, @option{ppc32}, @option{ppc64}, @option{ppc64bridge},
@option{ppcps}, @option{pwr}, @option{pwr2}, @option{pwr4}, @option{pwr5},
@option{pwr5x}, @option{pwr6}, @option{pwr7}, @option{pwr8}, @option{pwr9},
@option{pwr10}, @option{pwr11}, @option{pwrx}, @option{titan}, @option{vle},
and @option{future}.
@option{32} and @option{64} modify the default or a prior CPU
selection, disabling and enabling 64-bit insns respectively. In
addition, @option{altivec}, @option{any}, @option{lsp}, @option{htm},

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@@ -1392,6 +1392,8 @@ PowerPC options:\n"));
fprintf (stream, _("\
-mpower10, -mpwr10 generate code for Power10 architecture\n"));
fprintf (stream, _("\
-mpower11, -mpwr11 generate code for Power11 architecture\n"));
fprintf (stream, _("\
-mlibresoc generate code for Libre-SOC architecture\n"));
fprintf (stream, _("\
-mfuture generate code for 'future' architecture\n"));

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@@ -156,6 +156,9 @@ Generate code for Power9 architecture.
@item -mpower10, -mpwr10
Generate code for Power10 architecture.
@item -mpower11, -mpwr11
Generate code for Power11 architecture.
@item -mfuture
Generate code for 'future' architecture.

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@@ -208,6 +208,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "power11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "libresoc",(PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
@@ -267,6 +272,11 @@ struct ppc_mopt ppc_opts[] = {
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "pwr11", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_POWER10 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 },
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
0 },
{ "raw", PPC_OPCODE_PPC,
@@ -396,7 +406,7 @@ powerpc_init_dialect (struct disassemble_info *info)
break;
default:
if (info->arch == bfd_arch_powerpc)
dialect = ppc_parse_cpu (dialect, &sticky, "power10") | PPC_OPCODE_ANY;
dialect = ppc_parse_cpu (dialect, &sticky, "power11") | PPC_OPCODE_ANY;
else
dialect = ppc_parse_cpu (dialect, &sticky, "pwr");
break;