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x86: extend FPU test coverage for AT&T / Intel mnemonic differences

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Before touching the templates, let's ensure we actually cover things:
For one FSUB{,R} and FDIV{,R} would better be tested with operands in
both possible orders. And then -mmnemonic=intel wasn't tested at all.
This commit is contained in:
Jan Beulich
2022-11-30 09:05:57 +01:00
parent 629e5e1ae8
commit 3df781c5a4
5 changed files with 44 additions and 0 deletions
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4
gas/testsuite/gas/i386/compat-intel.d
View File

@@ -9,18 +9,22 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: dc e3 fsubr st\(3\),st
[ ]*[a-f0-9]+: d8 e3 fsub st,st\(3\)
[ ]*[a-f0-9]+: de e1 fsubrp st\(1\),st
[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st
[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st
[ ]*[a-f0-9]+: dc eb fsub st\(3\),st
[ ]*[a-f0-9]+: d8 eb fsubr st,st\(3\)
[ ]*[a-f0-9]+: de e9 fsubp st\(1\),st
[ ]*[a-f0-9]+: de eb fsubp st\(3\),st
[ ]*[a-f0-9]+: de eb fsubp st\(3\),st
[ ]*[a-f0-9]+: dc f3 fdivr st\(3\),st
[ ]*[a-f0-9]+: d8 f3 fdiv st,st\(3\)
[ ]*[a-f0-9]+: de f1 fdivrp st\(1\),st
[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st
[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st
[ ]*[a-f0-9]+: dc fb fdiv st\(3\),st
[ ]*[a-f0-9]+: d8 fb fdivr st,st\(3\)
[ ]*[a-f0-9]+: de f9 fdivp st\(1\),st
[ ]*[a-f0-9]+: de fb fdivp st\(3\),st
[ ]*[a-f0-9]+: de fb fdivp st\(3\),st

31
gas/testsuite/gas/i386/compat-intel2.d Normal file
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@@ -0,0 +1,31 @@
#as: -mmnemonic=intel
#objdump: -d -Mintel-mnemonic
#name: i386 float Intel mnemonic (2)
#source: compat.s
.*: +file format .*
Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: dc eb fsub st\(3\),st
[ ]*[a-f0-9]+: d8 e3 fsub st,st\(3\)
[ ]*[a-f0-9]+: de e9 fsubp st\(1\),st
[ ]*[a-f0-9]+: de eb fsubp st\(3\),st
[ ]*[a-f0-9]+: de eb fsubp st\(3\),st
[ ]*[a-f0-9]+: dc e3 fsubr st\(3\),st
[ ]*[a-f0-9]+: d8 eb fsubr st,st\(3\)
[ ]*[a-f0-9]+: de e1 fsubrp st\(1\),st
[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st
[ ]*[a-f0-9]+: de e3 fsubrp st\(3\),st
[ ]*[a-f0-9]+: dc fb fdiv st\(3\),st
[ ]*[a-f0-9]+: d8 f3 fdiv st,st\(3\)
[ ]*[a-f0-9]+: de f9 fdivp st\(1\),st
[ ]*[a-f0-9]+: de fb fdivp st\(3\),st
[ ]*[a-f0-9]+: de fb fdivp st\(3\),st
[ ]*[a-f0-9]+: dc f3 fdivr st\(3\),st
[ ]*[a-f0-9]+: d8 fb fdivr st,st\(3\)
[ ]*[a-f0-9]+: de f1 fdivrp st\(1\),st
[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st
[ ]*[a-f0-9]+: de f3 fdivrp st\(3\),st
#pass

4
gas/testsuite/gas/i386/compat.d
View File

@@ -8,18 +8,22 @@ Disassembly of section .text:
0+ <.text>:
[ ]*[a-f0-9]+: dc e3 fsub %st,%st\(3\)
[ ]*[a-f0-9]+: d8 e3 fsub %st\(3\),%st
[ ]*[a-f0-9]+: de e1 fsubp %st,%st\(1\)
[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\)
[ ]*[a-f0-9]+: de e3 fsubp %st,%st\(3\)
[ ]*[a-f0-9]+: dc eb fsubr %st,%st\(3\)
[ ]*[a-f0-9]+: d8 eb fsubr %st\(3\),%st
[ ]*[a-f0-9]+: de e9 fsubrp %st,%st\(1\)
[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\)
[ ]*[a-f0-9]+: de eb fsubrp %st,%st\(3\)
[ ]*[a-f0-9]+: dc f3 fdiv %st,%st\(3\)
[ ]*[a-f0-9]+: d8 f3 fdiv %st\(3\),%st
[ ]*[a-f0-9]+: de f1 fdivp %st,%st\(1\)
[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\)
[ ]*[a-f0-9]+: de f3 fdivp %st,%st\(3\)
[ ]*[a-f0-9]+: dc fb fdivr %st,%st\(3\)
[ ]*[a-f0-9]+: d8 fb fdivr %st\(3\),%st
[ ]*[a-f0-9]+: de f9 fdivrp %st,%st\(1\)
[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)
[ ]*[a-f0-9]+: de fb fdivrp %st,%st\(3\)

4
gas/testsuite/gas/i386/compat.s
View File

@@ -1,18 +1,22 @@
# Check SYSV mnemonic instructions.
.text
fsub %st,%st(3)
fsub %st(3),%st
fsubp
fsubp %st(3)
fsubp %st,%st(3)
fsubr %st,%st(3)
fsubr %st(3),%st
fsubrp
fsubrp %st(3)
fsubrp %st,%st(3)
fdiv %st,%st(3)
fdiv %st(3),%st
fdivp
fdivp %st(3)
fdivp %st,%st(3)
fdivr %st,%st(3)
fdivr %st(3),%st
fdivrp
fdivrp %st(3)
fdivrp %st,%st(3)

1
gas/testsuite/gas/i386/i386.exp
View File

@@ -178,6 +178,7 @@ if [gas_32_check] then {
run_dump_test "i386-intel"
run_dump_test "compat"
run_dump_test "compat-intel"
run_dump_test "compat-intel2"
run_dump_test "arch-1"
run_dump_test "arch-2"
run_dump_test "arch-3"