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2003-12-02 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>

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* Makefile.in : Add new machine m32r2.
        * m32r2.c : New file for m32r2.
	* mloop2.in : Ditto
	* model2.c : Ditto
	* sem2-switch.c : Ditto
        * m32r-sim.h : Add EVB register.
        * sim-if.h : Ditto
        * sim-main.h : Ditto
        * traps.c : Ditto
This commit is contained in:
Andrew Cagney
2003-12-07 02:27:45 +00:00
parent 48ecb30c92
commit 3c041444b5
7 changed files with 122 additions and 13 deletions
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23
sim/m32r/traps.c
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@@ -21,6 +21,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
#include "sim-main.h"
#include "targ-vals.h"
#define TRAP_FLUSH_CACHE 12
/* The semantic code invokes this for invalid (unrecognized) instructions.
CIA is the address with the invalid insn.
VPC is the virtual pc of the following insn. */
@@ -68,12 +69,18 @@ m32r_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
/* sm not changed */
m32rbf_h_psw_set (current_cpu, m32rbf_h_psw_get (current_cpu) & 0x80);
}
else
else if (MACH_NUM (CPU_MACH (current_cpu)) == MACH_M32RX)
{
m32rxf_h_bpsw_set (current_cpu, m32rxf_h_psw_get (current_cpu));
/* sm not changed */
m32rxf_h_psw_set (current_cpu, m32rxf_h_psw_get (current_cpu) & 0x80);
}
else
{
m32r2f_h_bpsw_set (current_cpu, m32r2f_h_psw_get (current_cpu));
/* sm not changed */
m32r2f_h_psw_set (current_cpu, m32r2f_h_psw_get (current_cpu) & 0x80);
}
a_m32r_h_cr_set (current_cpu, H_CR_BPC, cia);
sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
@@ -131,8 +138,10 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
{
/* The new pc is the trap vector entry.
We assume there's a branch there to some handler. */
USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
We assume there's a branch there to some handler.
Use cr5 as EVB (EIT Vector Base) register. */
/* USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; */
USI new_pc = a_m32r_h_cr_get (current_cpu, 5) + 0x40 + num * 4;
return new_pc;
}
@@ -169,9 +178,15 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
sim_stopped, SIM_SIGTRAP);
break;
case TRAP_FLUSH_CACHE:
/* Do nothing. */
break;
default :
{
USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
/* USI new_pc = EIT_TRAP_BASE_ADDR + num * 4; */
/* Use cr5 as EVB (EIT Vector Base) register. */
USI new_pc = a_m32r_h_cr_get (current_cpu, 5) + 0x40 + num * 4;
return new_pc;
}
}