forked from Imagelibrary/binutils-gdb
* Makefile.in (MAIN_INCLUDE_DEPS): Delete.
(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
This commit is contained in:
Doug Evans
@@ -46,26 +46,18 @@ typedef struct {
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#define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
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/* control registers */
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USI h_cr[16];
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#define GET_H_CR(a1) CPU (h_cr)[a1]
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#define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x))
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/* accumulator */
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DI h_accum;
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#define GET_H_ACCUM() CPU (h_accum)
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#define SET_H_ACCUM(x) (CPU (h_accum) = (x))
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/* start-sanitize-m32rx */
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/* accumulators */
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DI h_accums[2];
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/* end-sanitize-m32rx */
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#define GET_H_ACCUMS(a1) CPU (h_accums)[a1]
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#define SET_H_ACCUMS(a1, x) (CPU (h_accums)[a1] = (x))
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/* condition bit */
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BI h_cond;
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#define GET_H_COND() CPU (h_cond)
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#define SET_H_COND(x) (CPU (h_cond) = (x))
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/* psw part of psw */
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UQI h_psw;
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#define GET_H_PSW() CPU (h_psw)
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#define SET_H_PSW(x) (CPU (h_psw) = (x))
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/* backup psw */
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UQI h_bpsw;
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#define GET_H_BPSW() CPU (h_bpsw)
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@@ -127,6 +119,9 @@ struct argbuf {
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union sem semantic;
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int written;
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union {
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struct { /* empty format for unspecified field list */
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int empty;
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} fmt_empty;
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struct { /* e.g. add $dr,$sr */
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SI * i_dr;
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SI * i_sr;
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@@ -135,29 +130,29 @@ struct argbuf {
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unsigned char out_dr;
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} fmt_add;
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struct { /* e.g. add3 $dr,$sr,$hash$slo16 */
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INT f_simm16;
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SI * i_sr;
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HI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_add3;
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struct { /* e.g. and3 $dr,$sr,$uimm16 */
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UINT f_uimm16;
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SI * i_sr;
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USI f_uimm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_and3;
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struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */
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UINT f_uimm16;
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SI * i_sr;
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UHI f_uimm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_or3;
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struct { /* e.g. addi $dr,$simm8 */
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INT f_simm8;
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SI * i_dr;
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SI f_simm8;
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unsigned char in_dr;
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unsigned char out_dr;
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} fmt_addi;
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@@ -169,8 +164,8 @@ struct argbuf {
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unsigned char out_dr;
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} fmt_addv;
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struct { /* e.g. addv3 $dr,$sr,$simm16 */
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INT f_simm16;
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SI * i_sr;
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SI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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@@ -189,8 +184,8 @@ struct argbuf {
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unsigned char in_src2;
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} fmt_cmp;
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struct { /* e.g. cmpi $src2,$simm16 */
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INT f_simm16;
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SI * i_src2;
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SI f_simm16;
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unsigned char in_src2;
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} fmt_cmpi;
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struct { /* e.g. div $dr,$sr */
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@@ -207,8 +202,8 @@ struct argbuf {
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unsigned char out_dr;
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} fmt_ld;
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struct { /* e.g. ld $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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HI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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@@ -220,8 +215,8 @@ struct argbuf {
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unsigned char out_dr;
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} fmt_ldb;
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struct { /* e.g. ldb $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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HI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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@@ -233,8 +228,8 @@ struct argbuf {
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unsigned char out_dr;
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} fmt_ldh;
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struct { /* e.g. ldh $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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HI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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@@ -247,17 +242,17 @@ struct argbuf {
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unsigned char out_sr;
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} fmt_ld_plus;
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struct { /* e.g. ld24 $dr,$uimm24 */
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ADDR f_uimm24;
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ADDR i_uimm24;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ld24;
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struct { /* e.g. ldi8 $dr,$simm8 */
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SI f_simm8;
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INT f_simm8;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ldi8;
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struct { /* e.g. ldi16 $dr,$hash$slo16 */
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HI f_simm16;
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INT f_simm16;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ldi16;
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@@ -299,8 +294,8 @@ struct argbuf {
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unsigned char in_src1;
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} fmt_mvtachi;
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struct { /* e.g. mvtc $sr,$dcr */
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SI * i_sr;
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UINT f_r1;
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SI * i_sr;
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unsigned char in_sr;
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} fmt_mvtc;
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struct { /* e.g. nop */
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@@ -310,20 +305,20 @@ struct argbuf {
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int empty;
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} fmt_rac;
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struct { /* e.g. seth $dr,$hash$hi16 */
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UHI f_hi16;
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UINT f_hi16;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_seth;
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struct { /* e.g. sll3 $dr,$sr,$simm16 */
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INT f_simm16;
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SI * i_sr;
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SI f_simm16;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_sll3;
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struct { /* e.g. slli $dr,$uimm5 */
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UINT f_uimm5;
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SI * i_dr;
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USI f_uimm5;
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unsigned char in_dr;
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unsigned char out_dr;
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} fmt_slli;
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@@ -334,8 +329,8 @@ struct argbuf {
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unsigned char in_src1;
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} fmt_st;
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struct { /* e.g. st $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src2;
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HI f_simm16;
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SI * i_src1;
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unsigned char in_src2;
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unsigned char in_src1;
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@@ -347,8 +342,8 @@ struct argbuf {
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unsigned char in_src1;
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} fmt_stb;
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struct { /* e.g. stb $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src2;
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HI f_simm16;
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SI * i_src1;
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unsigned char in_src2;
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unsigned char in_src1;
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@@ -360,8 +355,8 @@ struct argbuf {
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unsigned char in_src1;
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} fmt_sth;
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struct { /* e.g. sth $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src2;
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HI f_simm16;
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SI * i_src1;
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unsigned char in_src2;
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unsigned char in_src1;
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@@ -383,36 +378,36 @@ struct argbuf {
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struct {
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union {
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struct { /* e.g. bc.s $disp8 */
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IADDR f_disp8;
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IADDR i_disp8;
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} fmt_bc8;
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struct { /* e.g. bc.l $disp24 */
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IADDR f_disp24;
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IADDR i_disp24;
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} fmt_bc24;
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struct { /* e.g. beq $src1,$src2,$disp16 */
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SI * i_src1;
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SI * i_src2;
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IADDR f_disp16;
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IADDR i_disp16;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_beq;
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struct { /* e.g. beqz $src2,$disp16 */
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SI * i_src2;
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IADDR f_disp16;
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IADDR i_disp16;
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unsigned char in_src2;
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} fmt_beqz;
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struct { /* e.g. bl.s $disp8 */
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IADDR f_disp8;
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IADDR i_disp8;
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unsigned char out_h_gr_14;
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} fmt_bl8;
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struct { /* e.g. bl.l $disp24 */
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IADDR f_disp24;
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IADDR i_disp24;
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unsigned char out_h_gr_14;
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} fmt_bl24;
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struct { /* e.g. bra.s $disp8 */
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IADDR f_disp8;
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IADDR i_disp8;
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} fmt_bra8;
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struct { /* e.g. bra.l $disp24 */
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IADDR f_disp24;
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IADDR i_disp24;
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} fmt_bra24;
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struct { /* e.g. jl $sr */
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SI * i_sr;
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@@ -427,14 +422,14 @@ struct argbuf {
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int empty;
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} fmt_rte;
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struct { /* e.g. trap $uimm4 */
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USI f_uimm4;
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UINT f_uimm4;
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} fmt_trap;
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} fields;
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#if WITH_SCACHE_PBB_M32RBF
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#if WITH_SCACHE_PBB
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SEM_PC addr_cache;
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#endif
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} cti;
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#if WITH_SCACHE_PBB_M32RBF
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#if WITH_SCACHE_PBB
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/* Writeback handler. */
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struct {
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/* Pointer to argbuf entry for insn whose results need writing back. */
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@@ -473,6 +468,12 @@ struct scache {
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/* Macros to simplify extraction, reading and semantic code.
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These define and assign the local vars that contain the insn's fields. */
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#define EXTRACT_FMT_EMPTY_VARS \
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/* Instruction fields. */ \
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unsigned int length;
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#define EXTRACT_FMT_EMPTY_CODE \
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length = 0; \
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#define EXTRACT_FMT_ADD_VARS \
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/* Instruction fields. */ \
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UINT f_op1; \
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@@ -595,7 +596,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp8; \
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SI f_disp8; \
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unsigned int length;
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#define EXTRACT_FMT_BC8_CODE \
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length = 2; \
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@@ -607,7 +608,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp24; \
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SI f_disp24; \
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unsigned int length;
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#define EXTRACT_FMT_BC24_CODE \
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length = 4; \
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@@ -621,7 +622,7 @@ struct scache {
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UINT f_r1; \
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UINT f_op2; \
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UINT f_r2; \
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INT f_disp16; \
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SI f_disp16; \
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unsigned int length;
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#define EXTRACT_FMT_BEQ_CODE \
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length = 4; \
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@@ -637,7 +638,7 @@ struct scache {
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UINT f_r1; \
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UINT f_op2; \
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UINT f_r2; \
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INT f_disp16; \
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SI f_disp16; \
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unsigned int length;
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#define EXTRACT_FMT_BEQZ_CODE \
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length = 4; \
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@@ -651,7 +652,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp8; \
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SI f_disp8; \
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unsigned int length;
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#define EXTRACT_FMT_BL8_CODE \
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length = 2; \
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@@ -663,7 +664,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp24; \
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SI f_disp24; \
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unsigned int length;
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#define EXTRACT_FMT_BL24_CODE \
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length = 4; \
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@@ -675,7 +676,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp8; \
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SI f_disp8; \
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unsigned int length;
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#define EXTRACT_FMT_BRA8_CODE \
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length = 2; \
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@@ -687,7 +688,7 @@ struct scache {
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/* Instruction fields. */ \
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UINT f_op1; \
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UINT f_r1; \
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INT f_disp24; \
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SI f_disp24; \
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unsigned int length;
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#define EXTRACT_FMT_BRA24_CODE \
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length = 4; \
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Reference in New Issue
Block a user