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This patch introduces ETE (Embedded Trace Extension) system registers for the AArch64 architecture.

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gas           * testsuite/gas/aarch64/ete.d: New test.
              * testsuite/gas/aarch64/ete.s: New test.

opcodes       * aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR.
This commit is contained in:
Przemyslaw Wirkus
2020-09-28 15:41:23 +01:00
committed by Nick Clifton
parent 1ff8e40105
commit 3454861d89
5 changed files with 48 additions and 0 deletions
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4
opcodes/ChangeLog
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@@ -1,3 +1,7 @@
2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add ETE system registers TRCEXTINSELR<0-3> and TRCRSR.
2020-09-28 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c: Add TRBE system registers TRBIDR_EL1 , TRBBASER_EL1 ,

6
opcodes/aarch64-opc.c
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@@ -4319,6 +4319,12 @@ const aarch64_sys_reg aarch64_sys_regs [] =
SR_CORE("trbsr_el1", CPENC (3,0,C9,C11,3), 0),
SR_CORE("trbtrg_el1", CPENC (3,0,C9,C11,6), 0),
SR_CORE ("trcextinselr0", CPENC (2,1,C0,C8,4), 0),
SR_CORE ("trcextinselr1", CPENC (2,1,C0,C9,4), 0),
SR_CORE ("trcextinselr2", CPENC (2,1,C0,C10,4), 0),
SR_CORE ("trcextinselr3", CPENC (2,1,C0,C11,4), 0),
SR_CORE ("trcrsr", CPENC (2,1,C0,C10,0), 0),
{ 0, CPENC (0,0,0,0,0), 0, 0 }
};