forked from Imagelibrary/binutils-gdb
import gdb-1999-10-04 snapshot
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@@ -55,13 +55,15 @@ SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
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{
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#if WITH_SCACHE
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/* Update the recorded pc in the cpu state struct. */
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/* Update the recorded pc in the cpu state struct.
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Only necessary for WITH_SCACHE case, but to avoid the
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conditional compilation .... */
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SET_H_PC (pc);
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#endif
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sim_engine_invalid_insn (current_cpu, pc);
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sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
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/* NOTREACHED */
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/* Virtual insns have zero size. Overwrite vpc with address of next insn
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using the default-insn-bitsize spec. When executing insns in parallel
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we may want to queue the fault and continue execution. */
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vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
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}
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return vpc;
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@@ -2675,7 +2677,9 @@ SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu)
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for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
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{
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int valid_p = CGEN_INSN_MACH_HAS_P (idesc_table[sf->index].idata, mach_num);
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const CGEN_INSN *insn = idesc_table[sf->index].idata;
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int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
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|| CGEN_INSN_MACH_HAS_P (insn, mach_num));
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#if FAST_P
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if (valid_p)
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idesc_table[sf->index].sem_fast = sf->fn;
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