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opcodes/

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* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
	coldfire.

	gas/testsuite/
	* gas/m68k/mcf-movsr.s: New.
	* gas/m68k/mcf-movsr.d: New.
	* gas/m68k/all.exp: Add mcf-movsr test.
This commit is contained in:
Nathan Sidwell
2007-10-17 13:44:09 +00:00
parent 11411de309
commit 25b07cd9c4
6 changed files with 42 additions and 2 deletions
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6
gas/testsuite/ChangeLog
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@@ -1,3 +1,9 @@
2007-10-17 Nathan Sidwell <nathan@codesourcery.com>
* gas/m68k/mcf-movsr.s: New.
* gas/m68k/mcf-movsr.d: New.
* gas/m68k/all.exp: Add mcf-movsr test.
2007-10-16 Nick Clifton <nickc@redhat.com> 2007-10-16 Nick Clifton <nickc@redhat.com>
* gas/elf/elf.exp: Accept COMMON in readelf's output. * gas/elf/elf.exp: Accept COMMON in readelf's output.

1
gas/testsuite/gas/m68k/all.exp
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@@ -49,6 +49,7 @@ if { [istarget m68*-*-*] || [istarget fido*-*-*] } then {
} }
run_dump_test mcf-mov3q run_dump_test mcf-mov3q
run_dump_test mcf-movsr
run_dump_test mode5 run_dump_test mode5
run_dump_test mcf-mac run_dump_test mcf-mac
run_dump_test mcf-emac run_dump_test mcf-emac

15
gas/testsuite/gas/m68k/mcf-movsr.d Normal file
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@@ -0,0 +1,15 @@
#name: mcf-movsr
#objdump: -d
#as: -mcpu=5329
.*: file format .*
Disassembly of section .text:
0+ <test_movsr>:
0: 46c3 movew %d3,%sr
2: 46fc ffff movew #-1,%sr
6: 40c3 movew %sr,%d3
8: 44c3 movew %d3,%ccr
a: 44fc ffff movew #-1,%ccr
e: 42c3 movew %ccr,%d3

13
gas/testsuite/gas/m68k/mcf-movsr.s Normal file
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@@ -0,0 +1,13 @@
.text
|*****************************************************************
| Test all permutations of movew sr and movew ccr
|*****************************************************************
.global test_movsr
test_movsr:
move.w %d3,%sr | Mode 0
move.w #-1,%sr | Mode 7.4
move.w %sr,%d3 | Mode 0
move.w %d3,%ccr | Mode 0
move.w #-1,%ccr | Mode 7.4
move.w %ccr,%d3 | Mode 0

5
opcodes/ChangeLog
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@@ -1,3 +1,8 @@
2007-10-17 Nathan Sidwell <nathan@codesourcery.com>
* m68k-opc.c (m68k_opcodes): Correct move sr and ccr masks for
coldfire.
2007-10-15 Peter Bergner <bergner@vnet.ibm.com> 2007-10-15 Peter Bergner <bergner@vnet.ibm.com>
* ppc-opc.c (powerpc_opcodes): Fix the first two operands of * ppc-opc.c (powerpc_opcodes): Fix the first two operands of

4
opcodes/m68k-opc.c
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@@ -1593,10 +1593,10 @@ const struct m68k_opcode m68k_opcodes[] =
{"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up }, {"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up },
{"movew", 2, one(0041300), one(0177770), "CsDs", mcfisa_a }, {"movew", 2, one(0041300), one(0177770), "CsDs", mcfisa_a },
{"movew", 2, one(0042300), one(0177700), ";wCd", m68000up }, {"movew", 2, one(0042300), one(0177700), ";wCd", m68000up },
{"movew", 2, one(0042300), one(0177700), "DsCd", mcfisa_a }, {"movew", 2, one(0042300), one(0177770), "DsCd", mcfisa_a },
{"movew", 4, one(0042374), one(0177777), "#wCd", mcfisa_a }, {"movew", 4, one(0042374), one(0177777), "#wCd", mcfisa_a },
{"movew", 2, one(0043300), one(0177700), ";wSd", m68000up }, {"movew", 2, one(0043300), one(0177700), ";wSd", m68000up },
{"movew", 2, one(0043300), one(0177700), "DsSd", mcfisa_a }, {"movew", 2, one(0043300), one(0177770), "DsSd", mcfisa_a },
{"movew", 4, one(0043374), one(0177777), "#wSd", mcfisa_a }, {"movew", 4, one(0043374), one(0177777), "#wSd", mcfisa_a },
{"movel", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a }, {"movel", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a },