* ld-mips-elf/pic-and-nonpic-3b.dd: Updated to use new PLT

entries.
        * ld-mips-elf/pic-and-nonpic-5b.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
        * ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.

ld/testsuite/ChangeLog

@@ -4,6 +4,8 @@
 	entries.
 	* ld-mips-elf/pic-and-nonpic-5b.dd: Likewise.
 	* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
+	* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
+	* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
 
 2009-07-16  H.J. Lu  <hongjiu.lu@intel.com>
 

ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n32.dd

@@ -27,21 +27,20 @@ Disassembly of section \.plt:
 00043060 <extf4@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	8df91008 	lw	t9,4104\(t3\)
-.*:	25f81008 	addiu	t8,t3,4104
 .*:	03200008 	jr	t9
+.*:	25f81008 	addiu	t8,t3,4104
 
 00043070 <extf5@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	8df9100c 	lw	t9,4108\(t3\)
-.*:	25f8100c 	addiu	t8,t3,4108
 .*:	03200008 	jr	t9
+.*:	25f8100c 	addiu	t8,t3,4108
 
 00043080 <extf3@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	8df91010 	lw	t9,4112\(t3\)
-.*:	25f81010 	addiu	t8,t3,4112
 .*:	03200008 	jr	t9
-.*:	00000000 	nop
+.*:	25f81010 	addiu	t8,t3,4112
 
 Disassembly of section \.text:
 

ld/testsuite/ld-mips-elf/pic-and-nonpic-6-n64.dd

@@ -27,21 +27,20 @@ Disassembly of section \.plt:
 0+430a0 <extf4@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	ddf91010 	ld	t9,4112\(t3\)
-.*:	25f81010 	addiu	t8,t3,4112
 .*:	03200008 	jr	t9
+.*:	25f81010 	addiu	t8,t3,4112
 
 0+430b0 <extf5@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	ddf91018 	ld	t9,4120\(t3\)
-.*:	25f81018 	addiu	t8,t3,4120
 .*:	03200008 	jr	t9
+.*:	25f81018 	addiu	t8,t3,4120
 
 0+430c0 <extf3@plt>:
 .*:	3c0f0008 	lui	t3,0x8
 .*:	ddf91020 	ld	t9,4128\(t3\)
-.*:	25f81020 	addiu	t8,t3,4128
 .*:	03200008 	jr	t9
-.*:	00000000 	nop
+.*:	25f81020 	addiu	t8,t3,4128
 
 Disassembly of section \.text: