Add support for G13 and G14 flag bits in RL78 ELF binaries.

inc	* rl78.h (E_FLAG_RL78_G10): Redefine.
	(E_FLAG_RL78_CPU_MASK, E_FLAG_RL78_ANY_CPU, E_FLAG_RL78_G13
	E_FLAG_RL78_G14): New flags.

bin	* readelf.c (get_machine_flags): Decode RL78's G13 and G14 flags.

gas	* config/tc-rl78.c (enum options): Add G13 and G14.
	(md_longopts): Add -mg13 and -mg14.
	(md_parse_option): Handle -mg13 and -mg14.
	(md_show_usage): List -mg13 and -mg14.
	* doc/c-rl78.texi: Add description of -mg13 and -mg14 options.

bfd	* elf32-rl78.c (rl78_cpu_name): New function.  Prints the name of
	the RL78 core based upon the flags.
	(rl78_elf_merge_private_bfd_data): Handle merging of G13 and G14
	flags.
	(rl78_elf_print_private_bfd_data): Use rl78_cpu_name.
	(elf32_rl78_machine): Always return bfd_mach_rl78.
This commit is contained in:
Nick Clifton
2015-03-19 15:37:43 +00:00
parent 8bf3b159e5
commit 1740ba0cec
9 changed files with 130 additions and 32 deletions

View File

@@ -106,7 +106,11 @@ END_RELOC_NUMBERS (R_RL78_max)
/* Values for the e_flags field in the ELF header. */
#define E_FLAG_RL78_64BIT_DOUBLES (1 << 0)
#define E_FLAG_RL78_DSP (1 << 1) /* Defined in the RL78 CPU Object file specification, but not explained. */
#define E_FLAG_RL78_G10 (1 << 2) /* CPU is missing register banks 1-3, so uses different ABI. */
#define E_FLAG_RL78_CPU_MASK 0x0c
#define E_FLAG_RL78_ANY_CPU 0x00 /* CPU not specified. Assume no CPU specific code usage. */
#define E_FLAG_RL78_G10 0x04 /* CPU is missing register banks 1-3, so uses different ABI. */
#define E_FLAG_RL78_G13 0x08 /* CPU uses a peripheral for multiply/divide. */
#define E_FLAG_RL78_G14 0x0c /* CPU has multiply/divide instructions. */
/* These define the addend field of R_RL78_RH_RELAX relocations. */
#define RL78_RELAXA_MASK 0x000000f0 /* Mask for relax types */