forked from Imagelibrary/binutils-gdb
PR 10288
* arm-dis.c (enum opcode_sentinels): New: Used to mark the
boundary between variaant and generic coprocessor instuctions.
(coprocessor): Use it.
Fix architecture version of MCRR and MRRC instructions.
(arm_opcdes): Fix patterns for STRB and STRH instructions.
(print_insn_coprocessor): Check architecture and extension masks.
Print a hexadecimal version of any decimal constant that is
outside of the range of -16 to +32.
(print_arm_address): Add a return value of the offset used in the
adress, if it is worth printing a hexadecimal version of it.
(print_insn_neon): Print a hexadecimal version of any decimal
constant that is outside of the range of -16 to +32.
(print_insn_arm): Likewise.
(print_insn_thumb16): Likewise.
(print_insn_thumb32): Likewise.
PR 10297
* arm-dis.c (UNDEFINED_INSTRUCTION): New macro for a description
of an undefined instruction.
(arm_opcodes): Use it.
(thumb_opcod): Use it.
(thumb32_opc): Use it.
Update expected disassembly regrexps in GAS and LD testsuites.
This commit is contained in:
Nick Clifton
@@ -1,3 +1,21 @@
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2009-06-29 Nick Clifton <nickc@redhat.com>
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PR 10288
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* ld-arm/arm-app-abs32.d: Update expected disassembly.
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* ld-arm/arm-app.d: Likewise.
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* ld-arm/arm-lib-plt32.d: Likewise.
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* ld-arm/arm-lib.d: Likewise.
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* ld-arm/arm-pic-veneer.d: Likewise.
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* ld-arm/armthumb-lib.d: Likewise.
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* ld-arm/farcall-mixed-app-v5.d: Likewise.
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* ld-arm/farcall-mixed-app.d: Likewise.
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* ld-arm/farcall-mixed-lib.d: Likewise.
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* ld-arm/group-relocs.d: Likewise.
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* ld-arm/mixed-app-v5.d: Likewise.
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* ld-arm/mixed-app.d: Likewise.
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* ld-arm/mixed-lib.d: Likewise.
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* ld-arm/thumb2-bl-undefweak.d: Likewise.
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2009-06-27 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/10337
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .* .*
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.*: e28fc6.* add ip, pc, #.* ; .*
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.*: e28cca.* add ip, ip, #.* ; .*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <lib_func1>:
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <lib_func1>:
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@@ -4,7 +4,7 @@
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Disassembly of section .text:
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00008000 <_start>:
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8000: ea000000 b 8008 <__foo_from_arm>
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8000: ea...... b 800. <.*>
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00008004 <foo>:
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8004: 46c0 nop \(mov r8, r8\)
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <lib_func1>:
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@@ -14,10 +14,10 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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@@ -16,10 +16,10 @@ Disassembly of section .plt:
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.*: 46c0 nop \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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@@ -13,16 +13,16 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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@@ -17,40 +17,40 @@ Disassembly of section .text:
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8028: e2800cee add r0, r0, #60928 ; 0xee00
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802c: e28000f0 add r0, r0, #240 ; 0xf0
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8030: e2800c6e add r0, r0, #28160 ; 0x6e00
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8034: e59010c0 ldr r1, \[r0, #192\]
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8034: e59010c0 ldr r1, \[r0, #192\].*
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8038: e28008ff add r0, r0, #16711680 ; 0xff0000
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803c: e2800c6e add r0, r0, #28160 ; 0x6e00
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8040: e59010b8 ldr r1, \[r0, #184\]
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8040: e59010b8 ldr r1, \[r0, #184\].*
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8044: e5901000 ldr r1, \[r0\]
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8048: e2800cee add r0, r0, #60928 ; 0xee00
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804c: e59010f0 ldr r1, \[r0, #240\]
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804c: e59010f0 ldr r1, \[r0, #240\].*
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8050: e28008ff add r0, r0, #16711680 ; 0xff0000
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8054: e2800cee add r0, r0, #60928 ; 0xee00
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8058: e59010f0 ldr r1, \[r0, #240\]
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805c: e1c026d0 ldrd r2, \[r0, #96\]
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8058: e59010f0 ldr r1, \[r0, #240\].*
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805c: e1c026d0 ldrd r2, \[r0, #96\].*
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8060: e2800c6e add r0, r0, #28160 ; 0x6e00
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8064: e1c029d0 ldrd r2, \[r0, #144\]
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8064: e1c029d0 ldrd r2, \[r0, #144\].*
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8068: e28008ff add r0, r0, #16711680 ; 0xff0000
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806c: e2800c6e add r0, r0, #28160 ; 0x6e00
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8070: e1c028d8 ldrd r2, \[r0, #136\]
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8070: e1c028d8 ldrd r2, \[r0, #136\].*
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8074: e1c020d0 ldrd r2, \[r0\]
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8078: e2800cee add r0, r0, #60928 ; 0xee00
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807c: e1c02fd0 ldrd r2, \[r0, #240\]
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807c: e1c02fd0 ldrd r2, \[r0, #240\].*
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8080: e28008ff add r0, r0, #16711680 ; 0xff0000
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8084: e2800cee add r0, r0, #60928 ; 0xee00
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8088: e1c02fd0 ldrd r2, \[r0, #240\]
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808c: ed90000c ldc 0, cr0, \[r0, #48\]
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8088: e1c02fd0 ldrd r2, \[r0, #240\].*
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808c: ed90000c ldc 0, cr0, \[r0, #48\].*
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8090: e2800c6e add r0, r0, #28160 ; 0x6e00
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8094: ed900018 ldc 0, cr0, \[r0, #96\]
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8094: ed900018 ldc 0, cr0, \[r0, #96\].*
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8098: e28008ff add r0, r0, #16711680 ; 0xff0000
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809c: e2800c6e add r0, r0, #28160 ; 0x6e00
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80a0: ed900016 ldc 0, cr0, \[r0, #88\]
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80a0: ed900016 ldc 0, cr0, \[r0, #88\].*
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80a4: ed900000 ldc 0, cr0, \[r0\]
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80a8: e2800cee add r0, r0, #60928 ; 0xee00
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80ac: ed90003c ldc 0, cr0, \[r0, #240\]
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80ac: ed90003c ldc 0, cr0, \[r0, #240\].*
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80b0: e28008ff add r0, r0, #16711680 ; 0xff0000
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80b4: e2800cee add r0, r0, #60928 ; 0xee00
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80b8: ed90003c ldc 0, cr0, \[r0, #240\]
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80b8: ed90003c ldc 0, cr0, \[r0, #240\].*
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000080bc <one_group_needed_alu_pc>:
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80bc: e3a00000 mov r0, #0 ; 0x0
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@@ -14,10 +14,10 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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@@ -16,10 +16,10 @@ Disassembly of section .plt:
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.*: 46c0 nop \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <_start>:
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@@ -14,7 +14,7 @@ Disassembly of section .plt:
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.*: .*
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.*: e28fc6.* add ip, pc, #.* ; 0x.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]!
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.*: e5bcf.* ldr pc, \[ip, #.*\]!.*
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Disassembly of section .text:
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.* <lib_func1>:
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@@ -6,4 +6,4 @@
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Disassembly of section .text:
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.* <foo>:
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.*: .... .... blx ... <foo-0x.*>
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.*: .... .... bl. ... <foo-0x.*>
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