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aarch64: Add support for Armv9.5-A architecture

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The new -march=armv9.5-a flag enables access to the
mandatory cpa, lut and faminmax extensions.
Existing test cases for features are extended to verify they
work without additional flags.
This commit is contained in:
Claudio Bantaloukas
2024-06-10 13:18:52 +00:00
committed by Richard Earnshaw
parent d5a0c0a308
commit 032eb4f718
13 changed files with 42 additions and 4 deletions
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2
gas/NEWS
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@@ -1,5 +1,7 @@
-*- text -*-
* Add support for 'armv9.5-a' for -march in AArch64 GAS.
* In x86 Intel syntax undue mnemonic suffixes are now warned about. This is
a first step towards rejecting their use where unjustified.

1
gas/config/tc-aarch64.c
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@@ -10595,6 +10595,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
{"armv9.2-a", AARCH64_ARCH_FEATURES (V9_2A)},
{"armv9.3-a", AARCH64_ARCH_FEATURES (V9_3A)},
{"armv9.4-a", AARCH64_ARCH_FEATURES (V9_4A)},
{"armv9.5-a", AARCH64_ARCH_FEATURES (V9_5A)},
{NULL, AARCH64_NO_FEATURES}
};

3
gas/doc/c-aarch64.texi
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@@ -116,7 +116,7 @@ following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a},
@code{armv8.9-a}, @code{armv8-r}, @code{armv9-a}, @code{armv9.1-a},
@code{armv9.2-a}, @code{armv9.3-a} and @code{armv9.4-a}.
@code{armv9.2-a}, @code{armv9.3-a}, @code{armv9.4-a} and @code{armv9.5-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are
@@ -334,6 +334,7 @@ automatically cause those extensions to be disabled.
@item @code{armv9.2-a} @tab @code{armv9.1-a}, @code{armv8.7-a}
@item @code{armv9.3-a} @tab @code{armv9.2-a}, @code{armv8.8-a}
@item @code{armv9.4-a} @tab @code{armv9.3-a}, @code{armv8.9-a}
@item @code{armv9.5-a} @tab @code{armv9.4-a}, @code{cpa}, @code{lut}, @code{faminmax}
@item @code{armv8-r} @tab @code{armv8.4-a+nolor}
@end multitable

1
gas/testsuite/gas/aarch64/advsimd-faminmax.d
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@@ -1,4 +1,5 @@
#objdump: -dr
#as: -march=armv9.5-a
#as: -march=armv8-a+faminmax
.*: file format .*

1
gas/testsuite/gas/aarch64/advsimd-lut.d
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@@ -1,4 +1,5 @@
#objdump: -dr
#as: -march=armv9.5-a
#as: -march=armv8-a+lut
.*: file format .*

10
gas/testsuite/gas/aarch64/armv9_5.d Normal file
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@@ -0,0 +1,10 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0+ <.*>:
[^:]+: 9a002000 addpt x0, x0, x0
[^:]+: 0ec01c00 famax v0.4h, v0.4h, v0.4h
[^:]+: 4e801000 luti2 v0.16b, {v0.16b}, v0\[0\]

9
gas/testsuite/gas/aarch64/armv9_5.s Normal file
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@@ -0,0 +1,9 @@
.text
.arch armv9.5-a
// CPA
addpt x0, x0, x0
// FAMINMAX
famax v0.4h, v0.4h, v0.4h
// LUT
luti2 v0.16b, { v0.16b }, v0[0]

1
gas/testsuite/gas/aarch64/cpa-addsub.d
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@@ -1,4 +1,5 @@
#name: Tests for CPA instructions ((M)ADDPT and (M)SUBPT).
#as: -march=armv9.5-a
#as: -march=armv8-a+cpa
#objdump: -dr

1
gas/testsuite/gas/aarch64/cpa-sve.d
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@@ -1,4 +1,5 @@
#name: Tests for CPA+SVE instructions.
#as: -march=armv9.5-a+sve
#as: -march=armv8-a+sve+cpa
#objdump: -dr

1
gas/testsuite/gas/aarch64/sme2-faminmax.d
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@@ -1,4 +1,5 @@
#objdump: -dr
#as: -march=armv9.5-a+sme2
#as: -march=armv8-a+faminmax+sme2
.*: file format .*

1
gas/testsuite/gas/aarch64/sve2-faminmax.d
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@@ -1,4 +1,5 @@
#objdump: -dr
#as: -march=armv9.5-a+sve2
#as: -march=armv8-a+faminmax+sve2
.*: file format .*

1
gas/testsuite/gas/aarch64/sve2-lut.d
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@@ -1,4 +1,5 @@
#objdump: -dr
#as: -march=armv9.5-a+sve2
#as: -march=armv8-a+lut+sve2
.*: file format .*

8
include/opcode/aarch64.h
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@@ -269,6 +269,8 @@ enum aarch64_feature_bit {
AARCH64_FEATURE_FP8DOT2_SVE,
/* +sme-f16f16 or +sme-f8f16 */
AARCH64_FEATURE_SME_F16F16_F8F16,
/* Armv9.5-A processors. */
AARCH64_FEATURE_V9_5A,
AARCH64_NUM_FEATURES
};
@@ -361,6 +363,10 @@ enum aarch64_feature_bit {
#define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X)
#define AARCH64_ARCH_V9_4A_FEATURES(X) (AARCH64_ARCH_V8_9A_FEATURES (X) \
| AARCH64_FEATBIT (X, SVE2p1))
#define AARCH64_ARCH_V9_5A_FEATURES(X) (AARCH64_FEATBIT (X, V9_5A) \
| AARCH64_FEATBIT (X, CPA) \
| AARCH64_FEATBIT (X, LUT) \
| AARCH64_FEATBIT (X, FAMINMAX))
/* Architectures are the sum of the base and extensions. */
#define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \
@@ -398,6 +404,8 @@ enum aarch64_feature_bit {
| AARCH64_ARCH_V9_3A_FEATURES (X))
#define AARCH64_ARCH_V9_4A(X) (AARCH64_ARCH_V9_3A (X) \
| AARCH64_ARCH_V9_4A_FEATURES (X))
#define AARCH64_ARCH_V9_5A(X) (AARCH64_ARCH_V9_4A (X) \
| AARCH64_ARCH_V9_5A_FEATURES (X))
#define AARCH64_ARCH_NONE(X) 0