forked from Imagelibrary/binutils-gdb
aarch64: Add support for Armv9.5-A architecture
The new -march=armv9.5-a flag enables access to the mandatory cpa, lut and faminmax extensions. Existing test cases for features are extended to verify they work without additional flags.
This commit is contained in:
committed by
Richard Earnshaw
parent
d5a0c0a308
commit
032eb4f718
2
gas/NEWS
2
gas/NEWS
@@ -1,5 +1,7 @@
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-*- text -*-
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-*- text -*-
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* Add support for 'armv9.5-a' for -march in AArch64 GAS.
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* In x86 Intel syntax undue mnemonic suffixes are now warned about. This is
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* In x86 Intel syntax undue mnemonic suffixes are now warned about. This is
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a first step towards rejecting their use where unjustified.
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a first step towards rejecting their use where unjustified.
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@@ -10595,6 +10595,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
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{"armv9.2-a", AARCH64_ARCH_FEATURES (V9_2A)},
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{"armv9.2-a", AARCH64_ARCH_FEATURES (V9_2A)},
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{"armv9.3-a", AARCH64_ARCH_FEATURES (V9_3A)},
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{"armv9.3-a", AARCH64_ARCH_FEATURES (V9_3A)},
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{"armv9.4-a", AARCH64_ARCH_FEATURES (V9_4A)},
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{"armv9.4-a", AARCH64_ARCH_FEATURES (V9_4A)},
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{"armv9.5-a", AARCH64_ARCH_FEATURES (V9_5A)},
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{NULL, AARCH64_NO_FEATURES}
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{NULL, AARCH64_NO_FEATURES}
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};
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};
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@@ -116,7 +116,7 @@ following architecture names are recognized: @code{armv8-a},
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@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
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@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
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@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a},
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@code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a},
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@code{armv8.9-a}, @code{armv8-r}, @code{armv9-a}, @code{armv9.1-a},
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@code{armv8.9-a}, @code{armv8-r}, @code{armv9-a}, @code{armv9.1-a},
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@code{armv9.2-a}, @code{armv9.3-a} and @code{armv9.4-a}.
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@code{armv9.2-a}, @code{armv9.3-a}, @code{armv9.4-a} and @code{armv9.5-a}.
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If both @option{-mcpu} and @option{-march} are specified, the
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If both @option{-mcpu} and @option{-march} are specified, the
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assembler will use the setting for @option{-mcpu}. If neither are
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assembler will use the setting for @option{-mcpu}. If neither are
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@@ -334,6 +334,7 @@ automatically cause those extensions to be disabled.
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@item @code{armv9.2-a} @tab @code{armv9.1-a}, @code{armv8.7-a}
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@item @code{armv9.2-a} @tab @code{armv9.1-a}, @code{armv8.7-a}
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@item @code{armv9.3-a} @tab @code{armv9.2-a}, @code{armv8.8-a}
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@item @code{armv9.3-a} @tab @code{armv9.2-a}, @code{armv8.8-a}
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@item @code{armv9.4-a} @tab @code{armv9.3-a}, @code{armv8.9-a}
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@item @code{armv9.4-a} @tab @code{armv9.3-a}, @code{armv8.9-a}
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@item @code{armv9.5-a} @tab @code{armv9.4-a}, @code{cpa}, @code{lut}, @code{faminmax}
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@item @code{armv8-r} @tab @code{armv8.4-a+nolor}
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@item @code{armv8-r} @tab @code{armv8.4-a+nolor}
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@end multitable
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@end multitable
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@@ -1,4 +1,5 @@
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#objdump: -dr
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#objdump: -dr
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#as: -march=armv9.5-a
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#as: -march=armv8-a+faminmax
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#as: -march=armv8-a+faminmax
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.*: file format .*
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.*: file format .*
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@@ -1,4 +1,5 @@
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#objdump: -dr
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#objdump: -dr
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#as: -march=armv9.5-a
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#as: -march=armv8-a+lut
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#as: -march=armv8-a+lut
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.*: file format .*
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.*: file format .*
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10
gas/testsuite/gas/aarch64/armv9_5.d
Normal file
10
gas/testsuite/gas/aarch64/armv9_5.d
Normal file
@@ -0,0 +1,10 @@
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0+ <.*>:
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[^:]+: 9a002000 addpt x0, x0, x0
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[^:]+: 0ec01c00 famax v0.4h, v0.4h, v0.4h
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[^:]+: 4e801000 luti2 v0.16b, {v0.16b}, v0\[0\]
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9
gas/testsuite/gas/aarch64/armv9_5.s
Normal file
9
gas/testsuite/gas/aarch64/armv9_5.s
Normal file
@@ -0,0 +1,9 @@
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.text
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.arch armv9.5-a
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// CPA
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addpt x0, x0, x0
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// FAMINMAX
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famax v0.4h, v0.4h, v0.4h
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// LUT
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luti2 v0.16b, { v0.16b }, v0[0]
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@@ -1,4 +1,5 @@
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#name: Tests for CPA instructions ((M)ADDPT and (M)SUBPT).
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#name: Tests for CPA instructions ((M)ADDPT and (M)SUBPT).
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#as: -march=armv9.5-a
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#as: -march=armv8-a+cpa
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#as: -march=armv8-a+cpa
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#objdump: -dr
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#objdump: -dr
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@@ -1,4 +1,5 @@
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#name: Tests for CPA+SVE instructions.
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#name: Tests for CPA+SVE instructions.
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#as: -march=armv9.5-a+sve
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#as: -march=armv8-a+sve+cpa
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#as: -march=armv8-a+sve+cpa
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#objdump: -dr
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#objdump: -dr
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@@ -1,4 +1,5 @@
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#objdump: -dr
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#objdump: -dr
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#as: -march=armv9.5-a+sme2
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#as: -march=armv8-a+faminmax+sme2
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#as: -march=armv8-a+faminmax+sme2
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.*: file format .*
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.*: file format .*
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@@ -1,4 +1,5 @@
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#objdump: -dr
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#objdump: -dr
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#as: -march=armv9.5-a+sve2
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#as: -march=armv8-a+faminmax+sve2
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#as: -march=armv8-a+faminmax+sve2
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.*: file format .*
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.*: file format .*
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@@ -1,4 +1,5 @@
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#objdump: -dr
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#objdump: -dr
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#as: -march=armv9.5-a+sve2
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#as: -march=armv8-a+lut+sve2
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#as: -march=armv8-a+lut+sve2
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.*: file format .*
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.*: file format .*
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@@ -269,6 +269,8 @@ enum aarch64_feature_bit {
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AARCH64_FEATURE_FP8DOT2_SVE,
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AARCH64_FEATURE_FP8DOT2_SVE,
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/* +sme-f16f16 or +sme-f8f16 */
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/* +sme-f16f16 or +sme-f8f16 */
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AARCH64_FEATURE_SME_F16F16_F8F16,
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AARCH64_FEATURE_SME_F16F16_F8F16,
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/* Armv9.5-A processors. */
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AARCH64_FEATURE_V9_5A,
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AARCH64_NUM_FEATURES
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AARCH64_NUM_FEATURES
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};
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};
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@@ -361,6 +363,10 @@ enum aarch64_feature_bit {
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#define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X)
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#define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X)
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#define AARCH64_ARCH_V9_4A_FEATURES(X) (AARCH64_ARCH_V8_9A_FEATURES (X) \
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#define AARCH64_ARCH_V9_4A_FEATURES(X) (AARCH64_ARCH_V8_9A_FEATURES (X) \
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| AARCH64_FEATBIT (X, SVE2p1))
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| AARCH64_FEATBIT (X, SVE2p1))
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#define AARCH64_ARCH_V9_5A_FEATURES(X) (AARCH64_FEATBIT (X, V9_5A) \
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| AARCH64_FEATBIT (X, CPA) \
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| AARCH64_FEATBIT (X, LUT) \
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| AARCH64_FEATBIT (X, FAMINMAX))
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/* Architectures are the sum of the base and extensions. */
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/* Architectures are the sum of the base and extensions. */
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#define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \
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#define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \
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@@ -398,6 +404,8 @@ enum aarch64_feature_bit {
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| AARCH64_ARCH_V9_3A_FEATURES (X))
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| AARCH64_ARCH_V9_3A_FEATURES (X))
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#define AARCH64_ARCH_V9_4A(X) (AARCH64_ARCH_V9_3A (X) \
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#define AARCH64_ARCH_V9_4A(X) (AARCH64_ARCH_V9_3A (X) \
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| AARCH64_ARCH_V9_4A_FEATURES (X))
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| AARCH64_ARCH_V9_4A_FEATURES (X))
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#define AARCH64_ARCH_V9_5A(X) (AARCH64_ARCH_V9_4A (X) \
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| AARCH64_ARCH_V9_5A_FEATURES (X))
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#define AARCH64_ARCH_NONE(X) 0
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#define AARCH64_ARCH_NONE(X) 0
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