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bpf: Add atomic compare-and-exchange instructions

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This patch adds the two remaining BPF v3 atomic instructions:
- BPF_INSN_ACMP{,32}: atomic compare-and-swap
- BPF_INSN_AXCHG{,32}: atomic (non-conditional) exchange

Tests and documentation are also updated.

gas/
	* doc/c-bpf.texi (BPF Instructions): Document atomic exchange and
	atomic compare-and-swap instructions.
	* testsuite/gas/bpf/atomic.s: Test ACMP, ACMP32, AXCHG, AXCGH32
	instructions.
	* testsuite/gas/bpf/atomic.d: Likewise.
	* testsuite/gas/bpf/atomic-be.d: Likewise.
	* testsuite/gas/bpf/atomic-pseudoc.s: Likewise.
	* testsuite/gas/bpf/atomic-pseudoc.d: Likewise.
	* testsuite/gas/bpf/atomic-be-pseudoc.d: Likewise.

include/
	* opcode/bpf.h (BPF_IMM32_ACMP): Fix typo.
	(enum bpf_insn_id): New entries for BPF_INSN_ACMP{,32} and
	BPF_INSN_AXCHG{,32}.

opcodes/
	* bpf-opc.c (bpf_opcodes): Add entries for ACMP{,32} and
	AXCHG{,32} instructions.
This commit is contained in:
David Faust
2023-07-24 14:50:34 -07:00
parent 055a4c8e0f
commit 02f68ef297
9 changed files with 82 additions and 5 deletions
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12
opcodes/bpf-opc.c
View File

@@ -403,6 +403,18 @@ const struct bpf_opcode bpf_opcodes[] =
{BPF_INSN_AFXOR32, "afxor32%W[ %dr %o16 ] , %sr", "%sw = atomic_fetch_xor ( ( u32 * ) ( %dr %o16 ) , %sw )",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AFXOR},
/* Atomic compare-and-swap, atomic exchange. */
{BPF_INSN_ACMP, "acmp%W[ %dr %o16 ] , %sr", "r0 = cmpxchg_64 ( %dr %o16 , r0 , %sr )",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_ACMP},
{BPF_INSN_AXCHG, "axchg%W[ %dr %o16 ] , %sr", "%sr = xchg_64 ( %dr %o16 , %sr )",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AXCHG},
/* Atomic compare-and-swap, atomic exchange (32-bit). */
{BPF_INSN_ACMP32, "acmp32%W[ %dr %o16 ], %sr", "w0 = cmpxchg32_32 ( %dr %o16 , w0 , %sw )",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_ACMP},
{BPF_INSN_AXCHG32, "axchg32%W[ %dr %o16 ], %sr", "%sw = xchg32_32 ( %dr %o16 , %sw )",
BPF_V3, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_W|BPF_MODE_ATOMIC|BPF_IMM32_AXCHG},
/* Old versions of aadd and aadd32. */
{BPF_INSN_AADD, "xadddw%W[ %dr %o16 ] , %sr", "* ( u64 * ) ( %dr %o16 ) += %sr",
BPF_V1, BPF_CODE|BPF_IMM32, BPF_CLASS_STX|BPF_SIZE_DW|BPF_MODE_ATOMIC|BPF_IMM32_AADD},