68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
/*
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i82527Offsets.h - register offset definitions for
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Intel 82527 CAN Controller
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Copyright 2001 Wind River Systems, Inc.
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*/
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/*
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modification history
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--------------------
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29may02,lsg modified for CAN driver update
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*/
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/*
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DESCRIPTION
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This file contains the functions i82527 register offsets
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*/
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#ifndef _I82527_OFFSETS_H_
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#define _I82527_OFFSETS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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#define I82527_R_CTRL 0
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#define I82527_R_SR 1
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#define I82527_R_INFR 2
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#define I82527_R_HSR 4
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#define I82527_R_GMS 6
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#define I82527_R_GME 8
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#define I82527_R_M15M 0x0C
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#define I82527_R_CLKO 0x1F
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#define I82527_R_BCR 0x2F
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#define I82527_R_BTR0 0x3F
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#define I82527_R_BTR1 0x4F
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#define I82527_R_INT 0x5F
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#define I82527_R_P1C 0x9F
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#define I82527_R_P2C 0xAF
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#define I82527_R_P1I 0xBF
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#define I82527_R_P2I 0xCF
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#define I82527_R_P1O 0xDF
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#define I82527_R_P2O 0xEF
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#define I82527_R_SRA 0xFF
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#define I82527_MAX_OFFSET 0x100
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#define I82527_R_RCV 0xF0
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#define I82527_R_XMT 0x10
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/* Register Offsets */
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#define I82527_OFFS_MSG 0x10 /* message address offset */
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#define I82527_OFFS_DATA 0x07 /* message offset for data bytes */
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#define I82527_OFFS_CTRL0 0x00 /* first message control register */
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#define I82527_OFFS_CTRL1 0x01 /* second message control register */
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#define I82527_OFFS_ARBIT 0x02 /* message arbitration register for setting the id*/
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#define I82527_OFFS_MCR 0x06 /* message configuration register */
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /*_I82527_OFFSETS_H_*/
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