499 lines
12 KiB
C
499 lines
12 KiB
C
/* sysMipsLib.c - MIPS system-dependent routines */
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/*
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* Copyright (c) 2001-2007 Wind River Systems, Inc.
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*
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* The right to copy, distribute, modify or otherwise make use
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* of this software may be licensed only pursuant to the terms
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* of an applicable Wind River license agreement.
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*/
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/*
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* This file has been developed or significantly modified by the
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* MIPS Center of Excellence Dedicated Engineering Staff.
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* This notice is as per the MIPS Center of Excellence Master Partner
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* Agreement, do not remove this notice without checking first with
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* WR/Platforms MIPS Center of Excellence engineering management.
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*/
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/*
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modification history
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--------------------
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01l,26jan07,pes Allow for override of initialization of sysCacheLibInit.
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01k,19jan06,pes Add comment deprecating sysClearTlb in favor of common
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routine.
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01j,10jan06,agf remove symbols duplicated in sysComms (SPR 114346)
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01i,21jul05,h_k decoupled cache libs.
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01h,06apr04,pes Clean up compilation warning in sysBusEar().
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01g,13mar02,agf replace (SM_OBJ || SM_NET) with SM_COMMON, SPR 74321
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01f,27feb02,pes Fix conditional to include sysProcNumSet
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01e,17jan02,tlc Add call to vxTas() to sysBusTas() (SPR #70336 fix).
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01d,16jul01,tlc Add CofE copyright.
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01c,27jun01,tlc Add conditional for (INCLUDE_SM_OBJ) and (INCLUDE_SM_NET) for
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sysLocalToBusAdrs, sysBusToLocalAdrs, sysBusIntAck, and
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sysBusIntGen.
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01b,15jun01,tlc Make each routine conditionally compiled so that BSPs may
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define thier own routines, if necessary.
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01a,13jun01,tlc Add sysIntDisable(). Remove sysBusTas().
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*/
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/*
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DESCRIPTION
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DO NOT EDIT THIS FILE.
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This library provides board-specific routines that are shared by *all* MIPS-based
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BSPs. MIPS BSPs utilize this file by creating a symbolic link from their
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directory to target/config/mipsCommon/sysMipsLib.c and include the file at the
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top of sysLib.c using
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#include "sysMipsLib.c"
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A list of provided routines follows. If a BSP requires a specialized routine,
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then #define the appropriate MACRO corresponding to the routine to be
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specialized in the BSPs sysLib.c file.
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ROUTINE MACRO
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------------------------------------------------------
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sysProcNumGet SYS_PROC_NUM_GET
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sysProcNumSet SYS_PROC_NUM_SET
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sysBusEid SYS_BUS_EID
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sysBusEar SYS_BUS_EAR
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sysClearTlb SYS_CLEAR_TLB (deprecated, see below)
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sysMaskVmeErr SYS_MASK_VME_ERR
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sysUnmaskVmeErr SYS_UNMASK_VMR_ERR
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sysLocalToBusAdrs SYS_LOCAL_TO_BUS_ADRS
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sysBusToLocalAdrs SYS_BUS_TO_LOCAL_ADRS
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sysBusIntAck SYS_BUS_INT_ACK
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sysBusIntGen SYS_BUS_INT_GEN
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sysIntEnable SYS_INT_ENABLE
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sysIntDisable SYS_INT_DISABLE
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sysSw0Gen SYS_SW0_GEN
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sysSw1Gen SYS_SW1_GEN
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sysSw0Ack SYS_SW0_ACK
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sysSw1Ack SYS_SW1_ACK
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sysBusTas SYS_BUS_TAS
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*/
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/* globals */
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int sysBus = BUS; /* system bus type (VME_BUS, etc) */
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int sysCpu = CPU; /* system CPU type (MIPS_Vr5400) */
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char *sysMemTopAdr= NULL; /* top of memory */
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char *sysBootLine = BOOT_LINE_ADRS; /* address of boot line */
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char *sysExcMsg = EXC_MSG_ADRS; /* catastrophic message area */
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int sysProcNum; /* processor number of this CPU */
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/* externals */
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IMPORT BOOL vxTas();
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#ifdef INCLUDE_CACHE_SUPPORT
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#ifndef CACHE_LIB_INIT_FUNC
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/* Initialize cache function pointer */
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IMPORT STATUS cacheMipsLibInit ();
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#define CACHE_LIB_INIT_FUNC cacheMipsLibInit
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#endif /* CACHE_LIB_INIT_FUNC */
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/* globals */
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FUNCPTR sysCacheLibInit = /*(FUNCPTR) CACHE_LIB_INIT_FUNC*/NULL;
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#else /* INCLUDE_CACHE_SUPPORT */
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/* globals */
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FUNCPTR sysCacheLibInit;
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#endif /* INCLUDE_CACHE_SUPPORT */
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#ifndef SYS_PROC_NUM_GET
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/******************************************************************************
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*
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* sysProcNumGet - get the processor number
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*
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* This routine returns the processor number for the CPU board, which is
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* set with sysProcNumSet().
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*
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* RETURNS: The processor number for the CPU board.
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*
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* SEE ALSO: sysProcNumSet()
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*/
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int sysProcNumGet (void)
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{
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return (sysProcNum);
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}
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#endif
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#ifndef SYS_PROC_NUM_SET
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/******************************************************************************
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*
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* sysProcNumSet - set the processor number
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*
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* This routine sets the processor number for this board. Processor numbers
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* should be unique on a single backplane.
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*
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* RETURNS: N/A
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*
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* SEE ALSO: sysProcNumGet()
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*/
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void sysProcNumSet
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(
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int procNum
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)
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{
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sysProcNum = procNum;
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}
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#endif
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#ifndef SYS_BUS_EID
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/******************************************************************************
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*
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* sysBusEid - get the value of the error ID register
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*
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* This routine returns the contents of the bus error status register
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* MIPS devices have no such register, so they simply return zero.
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*
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* RETURNS: 0, always.
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*/
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USHORT sysBusEid (void)
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{
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return (0);
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}
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#endif
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#ifndef SYS_BUS_EAR
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/******************************************************************************
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*
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* sysBusEar - get the access address of a bus error
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*
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* This routine returns the address of a bus error.
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*
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* NOTE:
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* This routine must be provided on all MIPS board support packages.
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* MIPS devices cannot determine the address that caused
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* a bus error. It is possible to determine the source of a read bus error
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* by interpreting the instruction stream that caused the bus error.
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*
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* RETURNS: -1, always.
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*/
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ULONG sysBusEar (void)
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{
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return (0xffffffff);
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}
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#endif
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#define SYS_CLEAR_TLB
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#ifndef SYS_CLEAR_TLB
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/******************************************************************************
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*
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* sysClearTlb - clear the translation lookaside buffer
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*
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* This routine clears the entries in the translation lookaside buffer (TLB)
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* for the MIPS devices.
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*
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* NOTICE: This function is deprecated. New BSPs and any BSP being updated
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* should use the common function mipsTlbClear.
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*
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* RETURNS: N/A
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*
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* NOMANUAL
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*/
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void sysClearTlb (void)
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{
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int tlbEntry;
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for (tlbEntry = 0; tlbEntry < TLB_ENTRIES; tlbEntry++)
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sysClearTlbEntry (tlbEntry);
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}
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#else
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/* pass through call to mipsTlbClear, which is the preferred interface */
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IMPORT void mipsTlbClear(void);
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void sysClearTlb (void)
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{
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mipsTlbClear();
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}
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#endif
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#ifndef SYS_MASK_VME_ERR
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/******************************************************************************
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*
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* sysMaskVmeErr - mask the VMEbus error interrupt
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*
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* This routine is required for all MIPS BSPs. It has no effect.
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*
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* RETURNS: 0.
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*
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* NOMANUAL
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*/
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UINT8 sysMaskVmeErr (void)
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{
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return (0);
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}
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#endif
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#ifndef SYS_UNMASK_VME_ERR
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/******************************************************************************
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*
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* sysUnmaskVmeErr - unmask the VMEbus error interrupt
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*
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* This routine is required for all MIPS BSPs. It has no effect.
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*
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* RETURNS: 0.
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*
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* NOMANUAL
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*/
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UINT8 sysUnmaskVmeErr (void)
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{
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return (0);
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}
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#endif
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#ifdef INCLUDE_SM_COMMON
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#ifndef SYS_LOCAL_TO_BUS_ADRS
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/******************************************************************************
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*
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* sysLocalToBusAdrs - convert a local address to a bus address
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*
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* Not Implemented
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*
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* NOMANUAL
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*/
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STATUS sysLocalToBusAdrs
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(
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int adrsSpace, /* bus address space in which busAdrs resides, */
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/* use address modifier codes defined in vme.h, */
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/* such as VME_AM_STD_SUP_DATA */
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char *localAdrs, /* local address to convert */
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char **pBusAdrs /* where to return bus address */
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)
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{
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return (ERROR);
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}
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#endif
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#ifndef SYS_BUS_TO_LOCAL_ADRS
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/******************************************************************************
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*
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* sysBusToLocalAdrs - convert a bus address to a local address
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*
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* Not Implemented
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*
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* NOMANUAL
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*/
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STATUS sysBusToLocalAdrs
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(
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int adrsSpace, /* bus address space in which busAdrs resides, */
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/* use address modifier codes defined in vme.h, */
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/* such as VME_AM_STD_SUP_DATA */
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char *busAdrs, /* bus address to convert */
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char **pLocalAdrs /* where to return local address */
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)
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{
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return (ERROR);
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}
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#endif
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#ifndef SYS_BUS_INT_ACK
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/******************************************************************************
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*
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* sysBusIntAck - acknowledge a bus interrupt
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*
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* Not Implemented
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*
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* NOMANUAL
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*/
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int sysBusIntAck
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(
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int intLevel /* interrupt level to acknowledge */
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)
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{
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return(ERROR);
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}
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#endif
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#ifndef SYS_BUS_INT_GEN
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/******************************************************************************
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*
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* sysBusIntGen - generate a bus interrupt
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*
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* Not Implemented
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* RETURNS: ERROR, since there is no external bus.
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*/
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STATUS sysBusIntGen
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(
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int level, /* bus interrupt level to generate */
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int vector /* interrupt vector to return (0-255) */
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)
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{
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return (ERROR);
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}
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#endif
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#endif /* INCLUDE_SM_COMMON */
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#ifndef SYS_INT_ENABLE
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/******************************************************************************
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*
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* sysIntEnable - enable a bus interrupt level
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*
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* Not Implemented
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*
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* NOMANUAL
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*/
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STATUS sysIntEnable
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(
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int intLevel /* interrupt level to enable (1-7) */
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)
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{
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return (ERROR);
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}
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#endif
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#ifndef SYS_INT_DISABLE
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/******************************************************************************
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*
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* sysIntDisable - disable a bus interrupt level
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*
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* Not Implemented
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*
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* NOMANUAL
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*/
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STATUS sysIntDisable
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(
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int intLevel /* interrupt level to disable (1-7) */
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)
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{
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return (ERROR);
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}
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#endif
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#ifndef SYS_SW0_GEN
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/*******************************************************************************
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*
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* sysSw0Gen - generate software interrupt 0
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*
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* This routine writes to the MIPS cause register to generate a software
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* interrupt.
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*
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* RETURNS: N/A
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*/
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void sysSw0Gen (void)
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{
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unsigned causeReg;
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causeReg = intCRGet ();
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causeReg |= CAUSE_SW1;
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intCRSet (causeReg);
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}
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#endif
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#ifndef SYS_SW1_GEN
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/*******************************************************************************
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*
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* sysSw1Gen - generate software interrupt 1
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*
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* This routine writes to the MIPS cause register to generate a software
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* interrupt.
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*
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* RETURNS: N/A
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*/
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void sysSw1Gen (void)
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{
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unsigned causeReg;
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causeReg = intCRGet ();
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causeReg |= CAUSE_SW2;
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intCRSet (causeReg);
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}
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#endif
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#ifndef SYS_SW0_ACK
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/*******************************************************************************
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*
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* sysSw0Ack - acknowledge software interrupt 0
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*
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* This routine writes to the MIPS cause register to acknowledge a software
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* interrupt.
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*
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* NOTE:
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* This routine is provided as a default interrupt service routine.
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*
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* RETURNS: N/A
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*/
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LOCAL int sysSw0Ack (void)
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{
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unsigned causeReg;
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causeReg = intCRGet ();
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causeReg &= ~CAUSE_SW1;
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intCRSet (causeReg);
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return (OK);
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}
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#endif
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#ifndef SYS_SW1_ACK
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/*******************************************************************************
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*
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* sysSw1Ack - acknowledge software interrupt 1
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*
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* This routine writes to the MIPS cause register to acknowledge a software
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* interrupt.
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*
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* NOTE:
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* This routine is provided as a default interrupt service routine.
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*
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* RETURNS: N/A
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*/
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LOCAL int sysSw1Ack (void)
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{
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unsigned causeReg;
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causeReg = intCRGet ();
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causeReg &= ~CAUSE_SW2;
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intCRSet (causeReg);
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return (OK);
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}
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#endif
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#ifndef SYS_BUS_TAS
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/******************************************************************************
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*
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* sysBusTas - test and set a location across the bus
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*
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* This routine performs a test-and-set operation across the backplane.
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*
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* RETURNS: TRUE if the value had not been set but is now, or FALSE if the
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* value was set already.
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*
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* SEE ALSO: vxTas()
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*/
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BOOL sysBusTas
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(
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char *adrs /* address to be tested-and-set */
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)
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{
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return (vxTas(adrs));
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}
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#endif
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