forked from Imagelibrary/seL4
80 lines
2.7 KiB
Python
80 lines
2.7 KiB
Python
#
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# Copyright 2020, Data61, CSIRO (ABN 41 687 119 230)
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#
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# SPDX-License-Identifier: GPL-2.0-only
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#
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from typing import List, Set
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from hardware.memory import Region
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class Config:
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''' Abstract config class '''
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arch = 'unknown'
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def __init__(self, sel4arch, addrspace_max):
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self.sel4arch = sel4arch
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self.addrspace_max = addrspace_max
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def get_kernel_phys_align(self) -> int:
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''' Used to align the base of physical memory. Returns alignment size in bits. '''
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return 0
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def get_page_bits(self) -> int:
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''' Get page size in bits for this arch '''
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return 12 # 4096-byte pages
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def get_smallest_kernel_object_alignment(self) -> int:
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return 4 # seL4_MinUntypedBits is 4 for all configurations
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def get_device_page_bits(self) -> int:
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''' Get page size in bits for mapping devices for this arch '''
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return self.get_page_bits()
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class ARMConfig(Config):
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''' Config class for ARM '''
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arch = 'arm'
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def __init__(self, sel4arch, addrspace_max):
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super().__init__(sel4arch, addrspace_max)
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# On AArch32 the kernel requires at least super section alignment for physBase.
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# Page sizes differ on arm_hyp which is why the alignment changes even though
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# both arm_hyp and arm are 32-bit.
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if sel4arch == 'arm_hyp':
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self.KERNEL_PHYS_ALIGN = 25
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elif sel4arch == 'aarch32':
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self.KERNEL_PHYS_ALIGN = 24
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else:
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self.KERNEL_PHYS_ALIGN = 0
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def get_kernel_phys_align(self) -> int:
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return self.KERNEL_PHYS_ALIGN
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class RISCVConfig(Config):
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''' Config class for RISCV '''
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arch = 'riscv'
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MEGAPAGE_BITS_RV32 = 22 # 2^22 = 4 MiByte
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MEGAPAGE_BITS_RV64 = 21 # 2^21 = 2 MiByte
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MEGA_PAGE_SIZE_RV64 = 2**MEGAPAGE_BITS_RV64
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def get_device_page_bits(self) -> int:
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''' Get page size in bits for mapping devices for this arch '''
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if (self.sel4arch == 'riscv32'):
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# 4MiB device pages
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return self.MEGAPAGE_BITS_RV32
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elif (self.sel4arch == 'riscv64'):
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# 2MiB device pages for sv39 and sv48
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return self.MEGAPAGE_BITS_RV64
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raise ValueError('Unsupported sel4arch "{}" specified.'.format(self.sel4arch))
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def get_arch_config(sel4arch: str, addrspace_max: int) -> Config:
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''' Return an appropriate Config object for the given architecture '''
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if sel4arch in ['aarch32', 'aarch64', 'arm_hyp']:
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return ARMConfig(sel4arch, addrspace_max)
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elif sel4arch in ['riscv32', 'riscv64']:
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return RISCVConfig(sel4arch, addrspace_max)
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else:
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raise ValueError('Unsupported sel4arch "{}" specified.'.format(sel4arch))
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