forked from Imagelibrary/seL4
f16411a518
These files are derived from the output of the device tree compiler in the Linux kernel. The licenses of the input files do all have to be compatible with at least GPL-2.0-only to be part of Linux.
666 lines
15 KiB
Plaintext
666 lines
15 KiB
Plaintext
/*
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* Copyright Linux Kernel Team
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*
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* SPDX-License-Identifier: GPL-2.0-only
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*
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* This file is derived from an intermediate build stage of the
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* Linux kernel. The licenses of all input files to this process
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* are compatible with GPL-2.0-only.
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*/
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/dts-v1/;
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/ {
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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compatible = "xlnx,zynq-zc706\0xlnx,zynq-7000";
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model = "Xilinx ZC706 board";
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cpus {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = < 0x00 >;
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clocks = < 0x01 0x03 >;
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clock-latency = < 0x3e8 >;
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cpu0-supply = < 0x02 >;
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operating-points = < 0xa2c2b 0xf4240 0x51616 0xf4240 >;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = < 0x01 >;
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clocks = < 0x01 0x03 >;
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};
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};
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fpga-full {
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compatible = "fpga-region";
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fpga-mgr = < 0x03 >;
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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ranges;
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};
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pmu@f8891000 {
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compatible = "arm,cortex-a9-pmu";
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interrupts = < 0x00 0x05 0x04 0x00 0x06 0x04 >;
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interrupt-parent = < 0x04 >;
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reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
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};
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fixedregulator {
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compatible = "regulator-fixed";
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regulator-name = "VCCPINT";
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regulator-min-microvolt = < 0xf4240 >;
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regulator-max-microvolt = < 0xf4240 >;
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regulator-boot-on;
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regulator-always-on;
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phandle = < 0x02 >;
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};
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amba {
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compatible = "simple-bus";
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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interrupt-parent = < 0x04 >;
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ranges;
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adc@f8007100 {
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compatible = "xlnx,zynq-xadc-1.00.a";
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reg = < 0xf8007100 0x20 >;
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interrupts = < 0x00 0x07 0x04 >;
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interrupt-parent = < 0x04 >;
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clocks = < 0x01 0x0c >;
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};
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can@e0008000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = < 0x01 0x13 0x01 0x24 >;
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clock-names = "can_clk\0pclk";
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reg = < 0xe0008000 0x1000 >;
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interrupts = < 0x00 0x1c 0x04 >;
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interrupt-parent = < 0x04 >;
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tx-fifo-depth = < 0x40 >;
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rx-fifo-depth = < 0x40 >;
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};
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can@e0009000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = < 0x01 0x14 0x01 0x25 >;
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clock-names = "can_clk\0pclk";
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reg = < 0xe0009000 0x1000 >;
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interrupts = < 0x00 0x33 0x04 >;
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interrupt-parent = < 0x04 >;
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tx-fifo-depth = < 0x40 >;
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rx-fifo-depth = < 0x40 >;
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};
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gpio@e000a000 {
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compatible = "xlnx,zynq-gpio-1.0";
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#gpio-cells = < 0x02 >;
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clocks = < 0x01 0x2a >;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = < 0x02 >;
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x14 0x04 >;
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reg = < 0xe000a000 0x1000 >;
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pinctrl-names = "default";
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pinctrl-0 = < 0x05 >;
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};
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i2c@e0004000 {
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compatible = "cdns,i2c-r1p10";
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status = "okay";
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clocks = < 0x01 0x26 >;
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x19 0x04 >;
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reg = < 0xe0004000 0x1000 >;
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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clock-frequency = < 0x61a80 >;
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pinctrl-names = "default";
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pinctrl-0 = < 0x06 >;
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i2c-mux@74 {
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compatible = "nxp,pca9548";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x74 >;
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i2c@0 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x00 >;
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clock-generator@5d {
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#clock-cells = < 0x00 >;
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compatible = "silabs,si570";
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temperature-stability = < 0x32 >;
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reg = < 0x5d >;
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factory-fout = < 0x9502f90 >;
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clock-frequency = < 0x8d9ee20 >;
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};
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};
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i2c@1 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x01 >;
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hdmi-tx@39 {
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compatible = "adi,adv7511";
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reg = < 0x39 >;
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adi,input-depth = < 0x08 >;
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adi,input-colorspace = "yuv422";
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adi,input-clock = "1x";
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adi,input-style = < 0x03 >;
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adi,input-justification = "evenly";
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};
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};
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i2c@2 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x02 >;
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eeprom@54 {
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compatible = "atmel,24c08";
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reg = < 0x54 >;
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};
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};
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i2c@3 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x03 >;
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gpio@21 {
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compatible = "ti,tca6416";
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reg = < 0x21 >;
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gpio-controller;
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#gpio-cells = < 0x02 >;
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};
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};
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i2c@4 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x04 >;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = < 0x51 >;
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};
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};
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i2c@7 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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reg = < 0x07 >;
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ucd90120@65 {
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compatible = "ti,ucd90120";
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reg = < 0x65 >;
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};
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};
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};
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};
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i2c@e0005000 {
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compatible = "cdns,i2c-r1p10";
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status = "disabled";
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clocks = < 0x01 0x27 >;
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x30 0x04 >;
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reg = < 0xe0005000 0x1000 >;
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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interrupt-controller@f8f01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = < 0x03 >;
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interrupt-controller;
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reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
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phandle = < 0x04 >;
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};
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cache-controller@f8f02000 {
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compatible = "arm,pl310-cache";
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reg = < 0xf8f02000 0x1000 >;
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interrupts = < 0x00 0x02 0x04 >;
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arm,data-latency = < 0x03 0x02 0x02 >;
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arm,tag-latency = < 0x02 0x02 0x02 >;
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cache-unified;
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cache-level = < 0x02 >;
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};
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = < 0xf8006000 0x1000 >;
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};
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serial@e0000000 {
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compatible = "xlnx,xuartps\0cdns,uart-r1p8";
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status = "disabled";
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clocks = < 0x01 0x17 0x01 0x28 >;
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clock-names = "uart_clk\0pclk";
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reg = < 0xe0000000 0x1000 >;
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interrupts = < 0x00 0x1b 0x04 >;
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};
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serial@e0001000 {
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compatible = "xlnx,xuartps\0cdns,uart-r1p8";
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status = "okay";
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clocks = < 0x01 0x18 0x01 0x29 >;
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clock-names = "uart_clk\0pclk";
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reg = < 0xe0001000 0x1000 >;
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interrupts = < 0x00 0x32 0x04 >;
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pinctrl-names = "default";
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pinctrl-0 = < 0x07 >;
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};
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spi@e0006000 {
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compatible = "xlnx,zynq-spi-r1p6";
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reg = < 0xe0006000 0x1000 >;
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status = "disabled";
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x1a 0x04 >;
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clocks = < 0x01 0x19 0x01 0x22 >;
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clock-names = "ref_clk\0pclk";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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spi@e0007000 {
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compatible = "xlnx,zynq-spi-r1p6";
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reg = < 0xe0007000 0x1000 >;
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status = "disabled";
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x31 0x04 >;
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clocks = < 0x01 0x1a 0x01 0x23 >;
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clock-names = "ref_clk\0pclk";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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ethernet@e000b000 {
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compatible = "cdns,zynq-gem\0cdns,gem";
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reg = < 0xe000b000 0x1000 >;
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status = "okay";
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interrupts = < 0x00 0x16 0x04 >;
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clocks = < 0x01 0x1e 0x01 0x1e 0x01 0x0d >;
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clock-names = "pclk\0hclk\0tx_clk";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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phy-mode = "rgmii-id";
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phy-handle = < 0x08 >;
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pinctrl-names = "default";
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pinctrl-0 = < 0x09 >;
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ethernet-phy@7 {
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reg = < 0x07 >;
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device_type = "ethernet-phy";
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phandle = < 0x08 >;
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};
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};
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ethernet@e000c000 {
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compatible = "cdns,zynq-gem\0cdns,gem";
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reg = < 0xe000c000 0x1000 >;
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status = "disabled";
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interrupts = < 0x00 0x2d 0x04 >;
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clocks = < 0x01 0x1f 0x01 0x1f 0x01 0x0e >;
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clock-names = "pclk\0hclk\0tx_clk";
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#address-cells = < 0x01 >;
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#size-cells = < 0x00 >;
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};
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sdhci@e0100000 {
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compatible = "arasan,sdhci-8.9a";
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status = "okay";
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clock-names = "clk_xin\0clk_ahb";
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clocks = < 0x01 0x15 0x01 0x20 >;
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x18 0x04 >;
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reg = < 0xe0100000 0x1000 >;
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pinctrl-names = "default";
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pinctrl-0 = < 0x0a >;
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};
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sdhci@e0101000 {
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compatible = "arasan,sdhci-8.9a";
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status = "disabled";
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clock-names = "clk_xin\0clk_ahb";
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clocks = < 0x01 0x16 0x01 0x21 >;
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interrupt-parent = < 0x04 >;
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interrupts = < 0x00 0x2f 0x04 >;
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reg = < 0xe0101000 0x1000 >;
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};
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slcr@f8000000 {
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#address-cells = < 0x01 >;
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#size-cells = < 0x01 >;
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compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd";
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reg = < 0xf8000000 0x1000 >;
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ranges;
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phandle = < 0x0b >;
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clkc@100 {
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#clock-cells = < 0x01 >;
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compatible = "xlnx,ps7-clkc";
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fclk-enable = < 0x00 >;
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clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb";
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reg = < 0x100 0x100 >;
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ps-clk-frequency = < 0x1fca055 >;
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phandle = < 0x01 >;
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};
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rstc@200 {
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compatible = "xlnx,zynq-reset";
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reg = < 0x200 0x48 >;
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#reset-cells = < 0x01 >;
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syscon = < 0x0b >;
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};
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pinctrl@700 {
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compatible = "xlnx,pinctrl-zynq";
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reg = < 0x700 0x200 >;
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syscon = < 0x0b >;
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gem0-default {
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phandle = < 0x09 >;
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mux {
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function = "ethernet0";
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groups = "ethernet0_0_grp";
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};
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conf {
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groups = "ethernet0_0_grp";
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slew-rate = < 0x00 >;
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io-standard = < 0x04 >;
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};
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conf-rx {
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pins = "MIO22\0MIO23\0MIO24\0MIO25\0MIO26\0MIO27";
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bias-high-impedance;
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low-power-disable;
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};
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conf-tx {
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pins = "MIO16\0MIO17\0MIO18\0MIO19\0MIO20\0MIO21";
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low-power-enable;
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bias-disable;
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};
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mux-mdio {
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function = "mdio0";
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groups = "mdio0_0_grp";
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};
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conf-mdio {
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groups = "mdio0_0_grp";
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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bias-disable;
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};
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};
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gpio0-default {
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phandle = < 0x05 >;
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mux {
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function = "gpio0";
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groups = "gpio0_7_grp\0gpio0_46_grp\0gpio0_47_grp";
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};
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conf {
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groups = "gpio0_7_grp\0gpio0_46_grp\0gpio0_47_grp";
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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};
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conf-pull-up {
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pins = "MIO46\0MIO47";
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bias-pull-up;
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};
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conf-pull-none {
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pins = "MIO7";
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bias-disable;
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};
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};
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i2c0-default {
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phandle = < 0x06 >;
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mux {
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groups = "i2c0_10_grp";
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function = "i2c0";
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};
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conf {
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groups = "i2c0_10_grp";
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bias-pull-up;
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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};
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};
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sdhci0-default {
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phandle = < 0x0a >;
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mux {
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groups = "sdio0_2_grp";
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function = "sdio0";
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};
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conf {
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groups = "sdio0_2_grp";
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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bias-disable;
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};
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mux-cd {
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groups = "gpio0_14_grp";
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function = "sdio0_cd";
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};
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conf-cd {
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groups = "gpio0_14_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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};
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mux-wp {
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groups = "gpio0_15_grp";
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function = "sdio0_wp";
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};
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conf-wp {
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groups = "gpio0_15_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = < 0x00 >;
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io-standard = < 0x01 >;
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};
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};
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uart1-default {
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|
phandle = < 0x07 >;
|
|
|
|
mux {
|
|
groups = "uart1_10_grp";
|
|
function = "uart1";
|
|
};
|
|
|
|
conf {
|
|
groups = "uart1_10_grp";
|
|
slew-rate = < 0x00 >;
|
|
io-standard = < 0x01 >;
|
|
};
|
|
|
|
conf-rx {
|
|
pins = "MIO49";
|
|
bias-high-impedance;
|
|
};
|
|
|
|
conf-tx {
|
|
pins = "MIO48";
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
usb0-default {
|
|
phandle = < 0x0d >;
|
|
|
|
mux {
|
|
groups = "usb0_0_grp";
|
|
function = "usb0";
|
|
};
|
|
|
|
conf {
|
|
groups = "usb0_0_grp";
|
|
slew-rate = < 0x00 >;
|
|
io-standard = < 0x01 >;
|
|
};
|
|
|
|
conf-rx {
|
|
pins = "MIO29\0MIO31\0MIO36";
|
|
bias-high-impedance;
|
|
};
|
|
|
|
conf-tx {
|
|
pins = "MIO28\0MIO30\0MIO32\0MIO33\0MIO34\0MIO35\0MIO37\0MIO38\0MIO39";
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
dmac@f8003000 {
|
|
compatible = "arm,pl330\0arm,primecell";
|
|
reg = < 0xf8003000 0x1000 >;
|
|
interrupt-parent = < 0x04 >;
|
|
interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7";
|
|
interrupts = < 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04 >;
|
|
#dma-cells = < 0x01 >;
|
|
#dma-channels = < 0x08 >;
|
|
#dma-requests = < 0x04 >;
|
|
clocks = < 0x01 0x1b >;
|
|
clock-names = "apb_pclk";
|
|
};
|
|
|
|
devcfg@f8007000 {
|
|
compatible = "xlnx,zynq-devcfg-1.0";
|
|
reg = < 0xf8007000 0x100 >;
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x08 0x04 >;
|
|
clocks = < 0x01 0x0c >;
|
|
clock-names = "ref_clk";
|
|
syscon = < 0x0b >;
|
|
phandle = < 0x03 >;
|
|
};
|
|
|
|
timer@f8f00200 {
|
|
compatible = "arm,cortex-a9-global-timer";
|
|
reg = < 0xf8f00200 0x20 >;
|
|
interrupts = < 0x01 0x0b 0x301 >;
|
|
interrupt-parent = < 0x04 >;
|
|
clocks = < 0x01 0x04 >;
|
|
};
|
|
|
|
timer@f8001000 {
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 >;
|
|
compatible = "cdns,ttc";
|
|
clocks = < 0x01 0x06 >;
|
|
reg = < 0xf8001000 0x1000 >;
|
|
};
|
|
|
|
timer@f8002000 {
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 >;
|
|
compatible = "cdns,ttc";
|
|
clocks = < 0x01 0x06 >;
|
|
reg = < 0xf8002000 0x1000 >;
|
|
};
|
|
|
|
timer@f8f00600 {
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x01 0x0d 0x301 >;
|
|
compatible = "arm,cortex-a9-twd-timer";
|
|
reg = < 0xf8f00600 0x20 >;
|
|
clocks = < 0x01 0x04 >;
|
|
};
|
|
|
|
usb@e0002000 {
|
|
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
|
|
status = "okay";
|
|
clocks = < 0x01 0x1c >;
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x15 0x04 >;
|
|
reg = < 0xe0002000 0x1000 >;
|
|
phy_type = "ulpi";
|
|
dr_mode = "host";
|
|
usb-phy = < 0x0c >;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = < 0x0d >;
|
|
};
|
|
|
|
usb@e0003000 {
|
|
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
|
|
status = "disabled";
|
|
clocks = < 0x01 0x1d >;
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x2c 0x04 >;
|
|
reg = < 0xe0003000 0x1000 >;
|
|
phy_type = "ulpi";
|
|
};
|
|
|
|
watchdog@f8005000 {
|
|
clocks = < 0x01 0x2d >;
|
|
compatible = "cdns,wdt-r1p2";
|
|
interrupt-parent = < 0x04 >;
|
|
interrupts = < 0x00 0x09 0x01 >;
|
|
reg = < 0xf8005000 0x1000 >;
|
|
timeout-sec = < 0x0a >;
|
|
};
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = "/amba/ethernet@e000b000";
|
|
i2c0 = "/amba/i2c@e0004000";
|
|
serial0 = "/amba/serial@e0001000";
|
|
mmc0 = "/amba/sdhci@e0100000";
|
|
};
|
|
|
|
memory@0 {
|
|
device_type = "memory";
|
|
reg = < 0x00 0x40000000 >;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = [ 00 ];
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
phy0 {
|
|
compatible = "usb-nop-xceiv";
|
|
#phy-cells = < 0x00 >;
|
|
phandle = < 0x0c >;
|
|
};
|
|
};
|